86 lines
2.0 KiB
YAML
86 lines
2.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Qualcomm QPNP PMIC Temperature Alarm
|
|
|
|
maintainers:
|
|
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
|
|
description:
|
|
QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips
|
|
that utilize the Qualcomm SPMI implementation. These peripherals provide an
|
|
interrupt signal and status register to identify high PMIC die temperature.
|
|
|
|
allOf:
|
|
- $ref: thermal-sensor.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
const: qcom,spmi-temp-alarm
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
io-channels:
|
|
items:
|
|
- description: ADC channel, which reports chip die temperature
|
|
|
|
io-channel-names:
|
|
items:
|
|
- const: thermal
|
|
|
|
'#thermal-sensor-cells':
|
|
const: 0
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- '#thermal-sensor-cells'
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
|
|
pmic {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
pm8350_temp_alarm: temperature-sensor@a00 {
|
|
compatible = "qcom,spmi-temp-alarm";
|
|
reg = <0xa00>;
|
|
interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
|
|
#thermal-sensor-cells = <0>;
|
|
};
|
|
};
|
|
|
|
thermal-zones {
|
|
pm8350_thermal: pm8350c-thermal {
|
|
polling-delay-passive = <100>;
|
|
polling-delay = <0>;
|
|
thermal-sensors = <&pm8350_temp_alarm>;
|
|
|
|
trips {
|
|
pm8350_trip0: trip0 {
|
|
temperature = <95000>;
|
|
hysteresis = <0>;
|
|
type = "passive";
|
|
};
|
|
|
|
pm8350_crit: pm8350c-crit {
|
|
temperature = <115000>;
|
|
hysteresis = <0>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
};
|