86 lines
2.0 KiB
YAML
86 lines
2.0 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QPNP PMIC Temperature Alarm
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description:
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QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips
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that utilize the Qualcomm SPMI implementation. These peripherals provide an
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interrupt signal and status register to identify high PMIC die temperature.
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allOf:
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- $ref: thermal-sensor.yaml#
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properties:
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compatible:
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const: qcom,spmi-temp-alarm
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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io-channels:
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items:
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- description: ADC channel, which reports chip die temperature
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io-channel-names:
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items:
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- const: thermal
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'#thermal-sensor-cells':
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const: 0
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required:
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- compatible
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- reg
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- interrupts
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- '#thermal-sensor-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pmic {
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#address-cells = <1>;
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#size-cells = <0>;
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pm8350_temp_alarm: temperature-sensor@a00 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0xa00>;
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interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
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#thermal-sensor-cells = <0>;
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};
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};
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thermal-zones {
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pm8350_thermal: pm8350c-thermal {
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polling-delay-passive = <100>;
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polling-delay = <0>;
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thermal-sensors = <&pm8350_temp_alarm>;
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trips {
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pm8350_trip0: trip0 {
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temperature = <95000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8350_crit: pm8350c-crit {
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temperature = <115000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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};
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};
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