240 lines
4.2 KiB
Plaintext
240 lines
4.2 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/*
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* VScom OnRISC
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* http://www.vscom.de
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*/
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/dts-v1/;
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#include "am335x-baltos.dtsi"
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#include "am335x-baltos-leds.dtsi"
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/ {
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model = "NetCom Plus";
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};
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&am33xx_pinmux {
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) /* RX */
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0) /* TX */
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AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) /* CTS */
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AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* RTS */
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AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* DTR */
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AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */
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AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DCD */
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AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* RI */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* RX */
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AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* TX */
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) /* CTS */
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* DTR */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DCD */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* RI */
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>;
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};
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};
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&usb0_phy {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
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dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
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dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
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rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&davinci_mdio_sw {
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phy0: ethernet-phy@0 {
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reg = <1>;
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};
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};
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&cpsw_port1 {
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phy-mode = "rmii";
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ti,dual-emac-pvid = <1>;
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phy-handle = <&phy0>;
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};
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&cpsw_port2 {
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phy-mode = "rgmii-id";
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ti,dual-emac-pvid = <2>;
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phy-handle = <&phy1>;
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};
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&gpio0 {
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gpio-line-names =
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"MDIO",
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"MDC",
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"UART2_RX",
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"UART2_TX",
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"I2C1_SDA",
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"I2C1_SCL",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"UART1_CTSN",
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"UART1_RTSN",
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"UART1_RX",
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"UART1_TX",
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"onrisc:blue:wlan",
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"onrisc:green:app",
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"USB0_DRVVBUS",
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"ETH2_INT",
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"NC",
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"NC",
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"MMC1_DAT0",
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"MMC1_DAT1",
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"NC",
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"NC",
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"MMC1_DAT2",
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"MMC1_DAT3",
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"NC",
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"NC",
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"GPMC_WAIT0",
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"GPMC_WP_N";
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};
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&gpio1 {
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gpio-line-names =
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"GPMC_AD0",
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"GPMC_AD1",
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"GPMC_AD2",
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"GPMC_AD3",
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"GPMC_AD4",
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"GPMC_AD5",
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"GPMC_AD6",
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"GPMC_AD7",
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"NC",
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"NC",
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"CONSOLE_RX",
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"CONSOLE_TX",
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"UART2_DTR",
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"UART2_DSR",
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"UART2_DCD",
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"UART2_RI",
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"RGMII2_TCTL",
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"RGMII2_RCTL",
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"RGMII2_TD3",
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"RGMII2_TD2",
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"RGMII2_TD1",
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"RGMII2_TD0",
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"RGMII2_TCLK",
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"RGMII2_RCLK",
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"RGMII2_RD3",
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"RGMII2_RD2",
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"RGMII2_RD1",
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"RGMII2_RD0",
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"PMIC_INT1",
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"GPMC_CSN0_Flash",
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"MMC1_CLK",
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"MMC1_CMD";
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};
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&gpio2 {
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gpio-line-names =
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"GPMC_CSN3_BUS",
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"GPMC_CLK",
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"GPMC_ADVN_ALE",
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"GPMC_OEN_RE_N",
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"GPMC_WE_N",
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"GPMC_BEN0_CLE",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"SW2_0",
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"SW2_1",
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"NC",
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"NC",
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"UART1_DTR",
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"UART1_DSR",
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"UART1_DCD",
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"UART1_RI",
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"MMC0_DAT3",
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"MMC0_DAT2",
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"MMC0_DAT1",
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"MMC0_DAT0",
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"MMC0_CLK",
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"MMC0_CMD";
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};
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&gpio3 {
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gpio-line-names =
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"onrisc:red:power",
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"NC",
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"NC",
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"NC",
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"NC",
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"UART2_CTSN",
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"UART2_RTSN",
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"WLAN_IRQ",
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"WLAN_EN",
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"SW2_2",
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"SW2_3",
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"NC",
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"NC",
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"NC",
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"ModeA0",
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"ModeA1",
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"ModeA2",
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"ModeA3",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC",
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"NC";
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};
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