382 lines
15 KiB
YAML
382 lines
15 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck -check-prefix=WAVE64 %s
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# XUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck -check-prefix=WAVE64 %s
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck -check-prefix=WAVE32 %s
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# XUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck -check-prefix=WAVE32 %s
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---
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name: test_dyn_stackalloc_sgpr_align1
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legalized: true
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frameInfo:
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maxAlignment: 2
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stack:
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- { id: 0, type: variable-sized, alignment: 1 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align1
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align1
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 1
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_align2
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legalized: true
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frameInfo:
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maxAlignment: 2
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stack:
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- { id: 0, type: variable-sized, alignment: 2 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align2
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align2
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 2
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_align4
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legalized: true
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frameInfo:
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maxAlignment: 4
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stack:
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- { id: 0, type: variable-sized, alignment: 4 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align4
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align4
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 4
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_align8
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legalized: true
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frameInfo:
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maxAlignment: 8
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stack:
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- { id: 0, type: variable-sized, alignment: 8 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align8
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align8
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 8
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_align16
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legalized: true
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frameInfo:
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maxAlignment: 16
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stack:
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- { id: 0, type: variable-sized, alignment: 16 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align16
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align16
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 16
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_align32
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legalized: true
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frameInfo:
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maxAlignment: 32
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stack:
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- { id: 0, type: variable-sized, alignment: 32 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align32
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -2048
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; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align32
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -1024
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; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 32
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_align64
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legalized: true
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frameInfo:
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maxAlignment: 64
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stack:
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- { id: 0, type: variable-sized, alignment: 64 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align64
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -4096
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; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align64
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -2048
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; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 64
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_align128
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legalized: true
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frameInfo:
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maxAlignment: 64
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stack:
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- { id: 0, type: variable-sized, alignment: 128 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align128
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -8192
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; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align128
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32)
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; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -4096
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; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5)
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%0:_(s32) = COPY $sgpr0
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%1:_(p5) = G_DYN_STACKALLOC %0, 128
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_constant_align4
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legalized: true
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frameInfo:
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maxAlignment: 4
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stack:
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- { id: 0, type: variable-sized, alignment: 4 }
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body: |
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bb.0:
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align4
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
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; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align4
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
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; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
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; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
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; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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%0:_(s32) = G_CONSTANT i32 32
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%1:_(p5) = G_DYN_STACKALLOC %0, 4
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S_ENDPGM 0, implicit %1
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...
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---
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name: test_dyn_stackalloc_sgpr_constant_align8
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legalized: true
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frameInfo:
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maxAlignment: 8
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stack:
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- { id: 0, type: variable-sized, alignment: 8 }
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align8
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; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
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; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
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; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
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; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
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; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
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; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
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; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align8
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; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
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; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
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; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
|
|
; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
|
|
; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
|
|
; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
|
|
%0:_(s32) = G_CONSTANT i32 32
|
|
%1:_(p5) = G_DYN_STACKALLOC %0, 8
|
|
S_ENDPGM 0, implicit %1
|
|
...
|
|
|
|
---
|
|
name: test_dyn_stackalloc_sgpr_constant_align16
|
|
legalized: true
|
|
frameInfo:
|
|
maxAlignment: 16
|
|
stack:
|
|
- { id: 0, type: variable-sized, alignment: 16 }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0
|
|
|
|
; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align16
|
|
; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
|
|
; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
|
|
; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
|
|
; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
|
|
; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
|
|
; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
|
|
; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align16
|
|
; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
|
|
; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
|
|
; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
|
|
; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
|
|
; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
|
|
; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5)
|
|
%0:_(s32) = G_CONSTANT i32 32
|
|
%1:_(p5) = G_DYN_STACKALLOC %0, 16
|
|
S_ENDPGM 0, implicit %1
|
|
...
|
|
|
|
---
|
|
name: test_dyn_stackalloc_sgpr_constant_align32
|
|
legalized: true
|
|
frameInfo:
|
|
maxAlignment: 32
|
|
stack:
|
|
- { id: 0, type: variable-sized, alignment: 32 }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0
|
|
|
|
; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align32
|
|
; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
|
|
; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6
|
|
; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
|
|
; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
|
|
; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
|
|
; WAVE64: [[C2:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -2048
|
|
; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C2]](s32)
|
|
; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5)
|
|
; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align32
|
|
; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32
|
|
; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5
|
|
; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32)
|
|
; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
|
|
; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32)
|
|
; WAVE32: [[C2:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -1024
|
|
; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C2]](s32)
|
|
; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5)
|
|
%0:_(s32) = G_CONSTANT i32 32
|
|
%1:_(p5) = G_DYN_STACKALLOC %0, 32
|
|
S_ENDPGM 0, implicit %1
|
|
...
|