# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck -check-prefix=WAVE64 %s # XUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck -check-prefix=WAVE64 %s # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck -check-prefix=WAVE32 %s # XUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck -check-prefix=WAVE32 %s --- name: test_dyn_stackalloc_sgpr_align1 legalized: true frameInfo: maxAlignment: 2 stack: - { id: 0, type: variable-sized, alignment: 1 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align1 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align1 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 1 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_align2 legalized: true frameInfo: maxAlignment: 2 stack: - { id: 0, type: variable-sized, alignment: 2 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align2 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align2 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 2 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_align4 legalized: true frameInfo: maxAlignment: 4 stack: - { id: 0, type: variable-sized, alignment: 4 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align4 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align4 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 4 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_align8 legalized: true frameInfo: maxAlignment: 8 stack: - { id: 0, type: variable-sized, alignment: 8 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align8 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align8 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 8 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_align16 legalized: true frameInfo: maxAlignment: 16 stack: - { id: 0, type: variable-sized, alignment: 16 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align16 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align16 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 16 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_align32 legalized: true frameInfo: maxAlignment: 32 stack: - { id: 0, type: variable-sized, alignment: 32 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align32 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -2048 ; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align32 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -1024 ; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 32 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_align64 legalized: true frameInfo: maxAlignment: 64 stack: - { id: 0, type: variable-sized, alignment: 64 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align64 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -4096 ; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align64 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -2048 ; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 64 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_align128 legalized: true frameInfo: maxAlignment: 64 stack: - { id: 0, type: variable-sized, alignment: 128 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_align128 ; WAVE64: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -8192 ; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_align128 ; WAVE32: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY]], [[C]](s32) ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY1]], [[SHL]](s32) ; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -4096 ; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C1]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5) %0:_(s32) = COPY $sgpr0 %1:_(p5) = G_DYN_STACKALLOC %0, 128 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_constant_align4 legalized: true frameInfo: maxAlignment: 4 stack: - { id: 0, type: variable-sized, alignment: 4 } body: | bb.0: ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align4 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align4 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = G_CONSTANT i32 32 %1:_(p5) = G_DYN_STACKALLOC %0, 4 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_constant_align8 legalized: true frameInfo: maxAlignment: 8 stack: - { id: 0, type: variable-sized, alignment: 8 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align8 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align8 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = G_CONSTANT i32 32 %1:_(p5) = G_DYN_STACKALLOC %0, 8 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_constant_align16 legalized: true frameInfo: maxAlignment: 16 stack: - { id: 0, type: variable-sized, alignment: 16 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align16 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTR_ADD]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align16 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTR_ADD]](p5) %0:_(s32) = G_CONSTANT i32 32 %1:_(p5) = G_DYN_STACKALLOC %0, 16 S_ENDPGM 0, implicit %1 ... --- name: test_dyn_stackalloc_sgpr_constant_align32 legalized: true frameInfo: maxAlignment: 32 stack: - { id: 0, type: variable-sized, alignment: 32 } body: | bb.0: liveins: $sgpr0 ; WAVE64-LABEL: name: test_dyn_stackalloc_sgpr_constant_align32 ; WAVE64: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE64: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 6 ; WAVE64: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE64: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE64: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE64: [[C2:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -2048 ; WAVE64: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C2]](s32) ; WAVE64: S_ENDPGM 0, implicit [[PTRMASK]](p5) ; WAVE32-LABEL: name: test_dyn_stackalloc_sgpr_constant_align32 ; WAVE32: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 32 ; WAVE32: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 5 ; WAVE32: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[C]], [[C1]](s32) ; WAVE32: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sp_reg ; WAVE32: [[PTR_ADD:%[0-9]+]]:sgpr(p5) = G_PTR_ADD [[COPY]], [[SHL]](s32) ; WAVE32: [[C2:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -1024 ; WAVE32: [[PTRMASK:%[0-9]+]]:sgpr(p5) = G_PTRMASK [[PTR_ADD]], [[C2]](s32) ; WAVE32: S_ENDPGM 0, implicit [[PTRMASK]](p5) %0:_(s32) = G_CONSTANT i32 32 %1:_(p5) = G_DYN_STACKALLOC %0, 32 S_ENDPGM 0, implicit %1 ...