14 lines
546 B
Plaintext
14 lines
546 B
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=armv7-none-eabi -verify-machineinstrs -run-pass arm-ldst-opt %s -o - | FileCheck %s
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---
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name: f
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# Make sure the load into $r0 doesn't clobber the base register before the second load uses it.
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body: |
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bb.0:
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liveins: $r0, $r3
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; CHECK-LABEL: name: f
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; CHECK: $r3 = LDRi12 $r0, 12, 14 /* CC::al */, $noreg
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; CHECK: $r0 = LDRi12 $r0, 8, 14 /* CC::al */, $noreg
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$r0, $r3 = LDRD $r0, $noreg, 8, 14, $noreg
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...
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