85 lines
4.2 KiB
LLVM
85 lines
4.2 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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define void @masked_scatter_nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %masks) nounwind {
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; CHECK-LABEL: masked_scatter_nxv2i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1b { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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define void @masked_scatter_nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %masks) nounwind {
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; CHECK-LABEL: masked_scatter_nxv2i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1h { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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define void @masked_scatter_nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %masks) nounwind {
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; CHECK-LABEL: masked_scatter_nxv2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1w { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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define void @masked_scatter_nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %masks) nounwind {
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; CHECK-LABEL: masked_scatter_nxv2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1d { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i64*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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define void @masked_scatter_nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %masks) nounwind {
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; CHECK-LABEL: masked_scatter_nxv2f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1h { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x half*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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define void @masked_scatter_nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs, <vscale x 2 x i1> %masks) nounwind #0 {
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; CHECK-LABEL: masked_scatter_nxv2bf16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1h { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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define void @masked_scatter_nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %masks) nounwind {
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; CHECK-LABEL: masked_scatter_nxv2f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1w { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x float*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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define void @masked_scatter_nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %masks) nounwind {
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; CHECK-LABEL: masked_scatter_nxv2f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1d { z0.d }, p0, [z1.d]
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; CHECK-NEXT: ret
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call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x double*> %ptrs, i32 0, <vscale x 2 x i1> %masks)
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ret void
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}
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declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x bfloat*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8*>, i32, <vscale x 2 x i1>)
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attributes #0 = { "target-features"="+sve,+bf16" }
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