; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s define void @masked_scatter_nxv2i8( %data, %ptrs, %masks) nounwind { ; CHECK-LABEL: masked_scatter_nxv2i8: ; CHECK: // %bb.0: ; CHECK-NEXT: st1b { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2i8( %data, %ptrs, i32 0, %masks) ret void } define void @masked_scatter_nxv2i16( %data, %ptrs, %masks) nounwind { ; CHECK-LABEL: masked_scatter_nxv2i16: ; CHECK: // %bb.0: ; CHECK-NEXT: st1h { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2i16( %data, %ptrs, i32 0, %masks) ret void } define void @masked_scatter_nxv2i32( %data, %ptrs, %masks) nounwind { ; CHECK-LABEL: masked_scatter_nxv2i32: ; CHECK: // %bb.0: ; CHECK-NEXT: st1w { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2i32( %data, %ptrs, i32 0, %masks) ret void } define void @masked_scatter_nxv2i64( %data, %ptrs, %masks) nounwind { ; CHECK-LABEL: masked_scatter_nxv2i64: ; CHECK: // %bb.0: ; CHECK-NEXT: st1d { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2i64( %data, %ptrs, i32 0, %masks) ret void } define void @masked_scatter_nxv2f16( %data, %ptrs, %masks) nounwind { ; CHECK-LABEL: masked_scatter_nxv2f16: ; CHECK: // %bb.0: ; CHECK-NEXT: st1h { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2f16( %data, %ptrs, i32 0, %masks) ret void } define void @masked_scatter_nxv2bf16( %data, %ptrs, %masks) nounwind #0 { ; CHECK-LABEL: masked_scatter_nxv2bf16: ; CHECK: // %bb.0: ; CHECK-NEXT: st1h { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2bf16( %data, %ptrs, i32 0, %masks) ret void } define void @masked_scatter_nxv2f32( %data, %ptrs, %masks) nounwind { ; CHECK-LABEL: masked_scatter_nxv2f32: ; CHECK: // %bb.0: ; CHECK-NEXT: st1w { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2f32( %data, %ptrs, i32 0, %masks) ret void } define void @masked_scatter_nxv2f64( %data, %ptrs, %masks) nounwind { ; CHECK-LABEL: masked_scatter_nxv2f64: ; CHECK: // %bb.0: ; CHECK-NEXT: st1d { z0.d }, p0, [z1.d] ; CHECK-NEXT: ret call void @llvm.masked.scatter.nxv2f64( %data, %ptrs, i32 0, %masks) ret void } declare void @llvm.masked.scatter.nxv2f16(, , i32, ) declare void @llvm.masked.scatter.nxv2bf16(, , i32, ) declare void @llvm.masked.scatter.nxv2f32(, , i32, ) declare void @llvm.masked.scatter.nxv2f64(, , i32, ) declare void @llvm.masked.scatter.nxv2i16(, , i32, ) declare void @llvm.masked.scatter.nxv2i32(, , i32, ) declare void @llvm.masked.scatter.nxv2i64(, , i32, ) declare void @llvm.masked.scatter.nxv2i8(, , i32, ) attributes #0 = { "target-features"="+sve,+bf16" }