136 lines
5.2 KiB
Plaintext
136 lines
5.2 KiB
Plaintext
|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||
|
|
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -o - %s | FileCheck %s --check-prefix=SI
|
||
|
|
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck %s --check-prefix=VI
|
||
|
|
---
|
||
|
|
name: test_zextload_flat_i32_i8
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0_vgpr1
|
||
|
|
|
||
|
|
; SI-LABEL: name: test_zextload_flat_i32_i8
|
||
|
|
; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load 1)
|
||
|
|
; SI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
|
||
|
|
; VI-LABEL: name: test_zextload_flat_i32_i8
|
||
|
|
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1)
|
||
|
|
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
|
||
|
|
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
|
||
|
|
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
||
|
|
; VI: $vgpr0 = COPY [[AND]](s32)
|
||
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
%1:_(s32) = G_ZEXTLOAD %0 :: (load 1, addrspace 0)
|
||
|
|
$vgpr0 = COPY %1
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_zextload_flat_i32_i16
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0_vgpr1
|
||
|
|
|
||
|
|
; SI-LABEL: name: test_zextload_flat_i32_i16
|
||
|
|
; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load 2)
|
||
|
|
; SI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
|
||
|
|
; VI-LABEL: name: test_zextload_flat_i32_i16
|
||
|
|
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 2)
|
||
|
|
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
||
|
|
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
|
||
|
|
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
||
|
|
; VI: $vgpr0 = COPY [[AND]](s32)
|
||
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
%1:_(s32) = G_ZEXTLOAD %0 :: (load 2, addrspace 0)
|
||
|
|
$vgpr0 = COPY %1
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_zextload_flat_i31_i8
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0_vgpr1
|
||
|
|
|
||
|
|
; SI-LABEL: name: test_zextload_flat_i31_i8
|
||
|
|
; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load 1)
|
||
|
|
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[ZEXTLOAD]](s32)
|
||
|
|
; SI: $vgpr0 = COPY [[COPY1]](s32)
|
||
|
|
; VI-LABEL: name: test_zextload_flat_i31_i8
|
||
|
|
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1)
|
||
|
|
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
|
||
|
|
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
|
||
|
|
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
||
|
|
; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
|
||
|
|
; VI: $vgpr0 = COPY [[COPY2]](s32)
|
||
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
%1:_(s31) = G_ZEXTLOAD %0 :: (load 1, addrspace 0)
|
||
|
|
%2:_(s32) = G_ANYEXT %1
|
||
|
|
$vgpr0 = COPY %2
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_zextload_flat_i64_i8
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0_vgpr1
|
||
|
|
|
||
|
|
; SI-LABEL: name: test_zextload_flat_i64_i8
|
||
|
|
; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load 1)
|
||
|
|
; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
|
||
|
|
; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
|
||
|
|
; VI-LABEL: name: test_zextload_flat_i64_i8
|
||
|
|
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1)
|
||
|
|
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
|
||
|
|
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
|
||
|
|
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
||
|
|
; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[AND]](s32)
|
||
|
|
; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
|
||
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
%1:_(s64) = G_ZEXTLOAD %0 :: (load 1, addrspace 0)
|
||
|
|
$vgpr0_vgpr1 = COPY %1
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_zextload_flat_i64_i16
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0_vgpr1
|
||
|
|
|
||
|
|
; SI-LABEL: name: test_zextload_flat_i64_i16
|
||
|
|
; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load 2)
|
||
|
|
; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
|
||
|
|
; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
|
||
|
|
; VI-LABEL: name: test_zextload_flat_i64_i16
|
||
|
|
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 2)
|
||
|
|
; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
||
|
|
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
|
||
|
|
; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
||
|
|
; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[AND]](s32)
|
||
|
|
; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
|
||
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
%1:_(s64) = G_ZEXTLOAD %0 :: (load 2, addrspace 0)
|
||
|
|
$vgpr0_vgpr1 = COPY %1
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_zextload_flat_i64_i32
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0_vgpr1
|
||
|
|
|
||
|
|
; SI-LABEL: name: test_zextload_flat_i64_i32
|
||
|
|
; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 4)
|
||
|
|
; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LOAD]](s32)
|
||
|
|
; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
|
||
|
|
; VI-LABEL: name: test_zextload_flat_i64_i32
|
||
|
|
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 4)
|
||
|
|
; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LOAD]](s32)
|
||
|
|
; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
|
||
|
|
%0:_(p0) = COPY $vgpr0_vgpr1
|
||
|
|
%1:_(s64) = G_ZEXTLOAD %0 :: (load 4, addrspace 0)
|
||
|
|
$vgpr0_vgpr1 = COPY %1
|
||
|
|
...
|