yannick.naumann/RT-Task-Generator-QEMU
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RT-Task-Generator-QEMU/tcg/riscv
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Richard Henderson d1c3f4e9ed tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25 13:57:52 +00:00
..
tcg-target-con-set.h
tcg/riscv: Support ANDN, ORN, XNOR from Zbb
2023-05-25 13:57:52 +00:00
tcg-target-con-str.h
tcg/riscv: Support ANDN, ORN, XNOR from Zbb
2023-05-25 13:57:52 +00:00
tcg-target.c.inc
tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb
2023-05-25 13:57:52 +00:00
tcg-target.h
tcg/riscv: Support ANDN, ORN, XNOR from Zbb
2023-05-25 13:57:52 +00:00