yannick.naumann/RT-Task-Generator-QEMU
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RT-Task-Generator-QEMU/target/arm
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Philippe Mathieu-Daudé 1797b08d24 tcg: Avoid including 'trace-tcg.h' in target translate.c 
The root trace-events only declares a single TCG event:

  $ git grep -w tcg trace-events
  trace-events:115:# tcg/tcg-op.c
  trace-events:137:vcpu tcg guest_mem_before(TCGv vaddr, uint16_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"

and only a tcg/tcg-op.c uses it:

  $ git grep -l trace_guest_mem_before_tcg
  tcg/tcg-op.c

therefore it is pointless to include "trace-tcg.h" in each target
(because it is not used). Remove it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210629050935.2570721-1-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09 09:38:33 -07:00
..
a32-uncond.decode
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
a32.decode
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
arch_dump.c
target/arm: add spaces around operator
2020-11-10 11:03:47 +00:00
arm_ldst.h
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
arm-powerctl.c
arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on()
2019-12-20 14:03:00 +00:00
arm-powerctl.h
target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset()
2019-02-28 11:03:04 +00:00
cpu64.c
target/arm: Implement MTE3
2021-06-24 14:58:48 +01:00
cpu_tcg.c
target/arm: Enable BFloat16 extensions
2021-06-03 16:43:26 +01:00
cpu-param.h
linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
2021-02-16 13:06:16 +00:00
cpu-qom.h
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
2020-09-18 14:12:32 -04:00
cpu.c
target/arm: Enable BFloat16 extensions
2021-06-03 16:43:26 +01:00
cpu.h
target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16
2021-06-03 16:43:25 +01:00
crypto_helper.c
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
debug_helper.c
target/arm: Stop assuming DBGDIDR always exists
2020-02-21 16:07:01 +00:00
gdbstub64.c
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
gdbstub.c
target/arm: use official org.gnu.gdb.aarch64.sve layout for registers
2021-01-18 10:05:06 +00:00
helper-a64.c
target/arm: Check NaN mode before silencing NaN
2021-07-02 11:48:36 +01:00
helper-a64.h
target/arm: Merge mte_check1, mte_checkN
2021-04-30 11:16:49 +01:00
helper-mve.h
target/arm: Implement MVE shifts by register
2021-07-02 11:48:38 +01:00
helper-sve.h
target/arm: Implement vector float32 to bfloat16 conversion
2021-06-03 16:43:26 +01:00
helper.c
target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2
2021-05-25 16:01:43 +01:00
helper.h
target/arm: Implement MVE VLDR/VSTR (non-widening forms)
2021-06-21 16:49:38 +01:00
idau.h
Use DECLARE_*CHECKER* macros
2020-09-09 09:27:09 -04:00
internals.h
target/arm: Implement MVE VLDR/VSTR (non-widening forms)
2021-06-21 16:49:38 +01:00
iwmmxt_helper.c
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
kvm64.c
target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
2021-06-21 16:49:37 +01:00
kvm_arm.h
hw/arm/virt: KVM: The IPA lower bound is 32
2021-03-12 12:47:11 +00:00
kvm-consts.h
target/arm: Remove no-longer-reachable 32-bit KVM code
2020-09-14 14:23:19 +01:00
kvm-stub.c
Include qemu-common.h exactly where needed
2019-06-12 13:20:20 +02:00
kvm.c
hw/arm/virt: KVM: The IPA lower bound is 32
2021-03-12 12:47:11 +00:00
m_helper.c
target/arm: Handle VPR semantics in existing code
2021-06-16 14:33:52 +01:00
m-nocp.decode
target/arm: Don't NOCP fault for FPCXT_NS accesses
2021-06-21 16:49:37 +01:00
machine.c
target/arm: Make FPSCR.LTPSIZE writable for MVE
2021-06-03 16:43:25 +01:00
meson.build
target/arm: Implement MVE VLDR/VSTR (non-widening forms)
2021-06-21 16:49:38 +01:00
monitor.c
target/arm: Add cpu properties to control pauth
2021-01-19 14:38:51 +00:00
mte_helper.c
target/arm: Implement MTE3
2021-06-24 14:58:48 +01:00
mve_helper.c
target/arm: Implement MVE shifts by register
2021-07-02 11:48:38 +01:00
mve.decode
target/arm: Implement MVE VADDLV
2021-07-02 11:48:37 +01:00
neon_helper.c
target/arm: Split out saturating/rounding shifts from neon
2021-05-25 16:01:43 +01:00
neon-dp.decode
target/arm: Implement vector float32 to bfloat16 conversion
2021-06-03 16:43:26 +01:00
neon-ls.decode
target/arm: Fix decode of align in VLDST_single
2021-04-30 11:16:49 +01:00
neon-shared.decode
target/arm: Implement bfloat widening fma (indexed)
2021-06-03 16:43:26 +01:00
op_addsub.h
Move target-* CPU file into a target/ folder
2016-12-20 21:52:12 +01:00
op_helper.c
target/arm: use raise_exception_ra for stack limit exception
2021-06-03 16:43:25 +01:00
pauth_helper.c
target/arm: Implement an IMPDEF pauth algorithm
2021-01-19 14:38:51 +00:00
psci.c
sysemu: Split sysemu/runstate.h off sysemu/sysemu.h
2019-08-16 13:37:36 +02:00
sve_helper.c
bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations
2021-06-16 14:33:52 +01:00
sve.decode
target/arm: Implement bfloat widening fma (indexed)
2021-06-03 16:43:26 +01:00
syndrome.h
target/arm: Split out syndrome.h from internals.h
2021-02-16 13:16:18 +00:00
t16.decode
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
t32.decode
target/arm: Implement MVE shifts by register
2021-07-02 11:48:38 +01:00
tlb_helper.c
target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
2021-03-23 14:07:55 +00:00
trace-events
docs: fix references to docs/devel/tracing.rst
2021-06-02 06:51:09 +02:00
trace.h
trace: switch position of headers to what Meson requires
2020-08-21 06:18:24 -04:00
translate-a32.h
target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
2021-06-24 14:58:48 +01:00
translate-a64.c
tcg: Avoid including 'trace-tcg.h' in target translate.c
2021-07-09 09:38:33 -07:00
translate-a64.h
target/arm: Implement SVE2 XAR
2021-05-25 16:01:44 +01:00
translate-m-nocp.c
target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
2021-06-21 16:49:38 +01:00
translate-mve.c
target/arm: Implement MVE VADDLV
2021-07-02 11:48:37 +01:00
translate-neon.c
target/arm: Implement MVE vector shift right by immediate insns
2021-07-02 11:48:37 +01:00
translate-sve.c
tcg: Avoid including 'trace-tcg.h' in target translate.c
2021-07-09 09:38:33 -07:00
translate-vfp.c
target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
2021-06-24 14:58:48 +01:00
translate.c
tcg: Avoid including 'trace-tcg.h' in target translate.c
2021-07-09 09:38:33 -07:00
translate.h
target/arm: Implement MVE shifts by register
2021-07-02 11:48:38 +01:00
vec_helper.c
target/arm: Move expand_pred_b() data to vec_helper.c
2021-06-16 14:33:52 +01:00
vec_internal.h
target/arm: Move expand_pred_b() data to vec_helper.c
2021-06-16 14:33:52 +01:00
vfp_helper.c
target/arm: Check NaN mode before silencing NaN
2021-07-02 11:48:36 +01:00
vfp-uncond.decode
arm tcg cpus: Fix Lesser GPL version number
2020-11-15 16:42:14 +01:00
vfp.decode
target/arm: Don't NOCP fault for FPCXT_NS accesses
2021-06-21 16:49:37 +01:00