Paolo Bonzini 38e65936a8 target/i386: allow MMX instructions with CR4.OSFXSR=0 ...

MMX state is saved/restored by FSAVE/FRSTOR so the instructions are
not illegal opcodes even if CR4.OSFXSR=0.  Make sure that validate_vex
takes into account the prefix and only checks HF_OSFXSR_MASK in the
presence of an SSE instruction.

Fixes: 20581aadec5e ("target/i386: validate VEX prefixes via the instructions' exception classes", 2022-10-18)
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1350
Reported-by: Helge Konetzka (@hejko on gitlab.com)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2022-12-01 09:05:05 +01:00

..

hax

Clean up header guards that don't match their file name

2022-05-11 16:49:06 +02:00

hvf

hvf: Enable RDTSCP support

2022-07-13 00:05:39 +02:00

kvm

target/i386: Set maximum APIC ID to KVM prior to vCPU creation

2022-10-31 09:46:34 +01:00

nvmm

Clean up header guards that don't match their file name

2022-05-11 16:49:06 +02:00

tcg

target/i386: allow MMX instructions with CR4.OSFXSR=0

2022-12-01 09:05:05 +01:00

whpx

Drop useless casts from g_malloc() & friends to pointer

2022-10-22 23:15:40 +02:00

arch_dump.c

dump: Replace opaque DumpState pointer with a typed one

2022-10-06 19:30:43 +04:00

arch_memory_mapping.c

exec,dump,i386,ppc,s390x: don't include exec/cpu-all.h explicitly

2017-09-19 18:21:33 +02:00

cpu-dump.c

monitor: Trim some trailing space from human-readable output

2021-10-31 21:05:40 +01:00

cpu-internal.h

i386: split off sysemu part of cpu.c

2021-05-10 15:41:52 -04:00

cpu-param.h

target/i386: Add MMU_PHYS_IDX and MMU_NESTED_IDX

2022-10-18 13:58:04 +02:00

cpu-qom.h

target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro

2022-03-06 22:23:09 +01:00

cpu-sysemu.c

Fix 'writeable' typos

2022-06-08 19:38:47 +01:00

cpu.c

target/i386: implement FMA instructions

2022-10-22 09:05:54 +02:00

cpu.h

target/i386: implement F16C instructions

2022-10-20 15:16:18 +02:00

gdbstub.c

target/i386: fix byte swap issue with XMM register access

2022-04-20 16:04:20 +01:00

helper.c

target/i386: Use cpu_unwind_state_data for tpr access

2022-11-01 08:31:37 +11:00

helper.h

target/i386: Expand eflags updates inline

2022-11-01 08:31:41 +11:00

host-cpu.c

i386: do not call cpudef-only models functions for max, host, base

2021-07-23 15:47:13 +02:00

host-cpu.h

accel-cpu: make cpu_realizefn return a bool

2021-05-10 15:41:50 -04:00

Kconfig

meson: Introduce target-specific Kconfig

2021-07-09 18:21:34 +02:00

machine.c

i386: kvm: extend kvm_{get, put}_vcpu_events to support pending triple fault

2022-10-10 09:23:16 +02:00

meson.build

target/i386/sev: Remove stubs by using code elision

2021-10-13 10:47:49 +02:00

monitor.c

monitor: remove 'info ioapic' HMP command

2021-11-02 15:55:13 +00:00

ops_sse_header.h

target/i386: implement FMA instructions

2022-10-22 09:05:54 +02:00

ops_sse.h

target/i386: implement FMA instructions

2022-10-22 09:05:54 +02:00

sev-sysemu-stub.c

monitor: Reduce hmp_info_sev() declaration

2021-10-13 10:47:49 +02:00

sev.c

qapi, target/i386/sev: Add cpu0-id to query-sev-capabilities

2022-04-06 10:50:37 +02:00

sev.h

Clean up header guards that don't match their file name

2022-05-11 16:49:06 +02:00

shift_helper_template.h

x86 tcg cpus: Fix Lesser GPL version number

2020-11-15 16:41:42 +01:00

svm.h

target/i386: Added vVMLOAD and vVMSAVE feature

2021-09-13 13:56:26 +02:00

trace-events

* Update the references to some doc files (use *.rst instead of *.txt)

2021-06-02 17:08:11 +01:00

trace.h

trace: switch position of headers to what Meson requires

2020-08-21 06:18:24 -04:00

xsave_helper.c

x86: add support for KVM_CAP_XSAVE2 and AMX state migration

2022-03-15 11:50:50 +01:00