Hervé Poussineau 30a3e70167 rtl8139: correctly handle PHY reset
According to datasheet:
"[Bit 15 of Basic Mode Control Register] sets the status and control registers
of the PHY (register 0062-0074) in a default state. This bit is self-clearing.
1 = software reset; 0 = normal operation."

This fixes the netcard detection failure in Minoca OS.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-01-06 10:38:05 +08:00
..
2016-10-04 13:28:07 +01:00
2016-10-24 15:46:10 +02:00
2016-06-17 16:33:48 +10:00
2016-10-28 15:51:27 +01:00
2016-05-18 15:04:27 +03:00
2016-10-24 15:27:20 +02:00
2016-12-27 14:59:28 +00:00
2017-01-06 10:38:05 +08:00
2016-01-29 15:07:25 +00:00
2016-09-22 18:13:08 +01:00
2016-09-29 11:43:22 +08:00
2016-10-28 18:17:24 +03:00
2016-09-15 15:32:22 +03:00
2016-10-24 15:27:20 +02:00
2016-10-04 13:28:07 +01:00