target/microblaze: Define TCG_GUEST_DEFAULT_MO
The microblaze architecture does not reorder instructions. While there is an MBAR wait-for-data-access instruction, this concerns synchronizing with DMA. This should have been defined when enabling MTTCG. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Fixes: d449561b130 ("configure: microblaze: Enable mttcg") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -24,6 +24,9 @@
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#include "exec/cpu-defs.h"
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#include "qemu/cpu-float.h"
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/* MicroBlaze is always in-order. */
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#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
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typedef struct CPUArchState CPUMBState;
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#if !defined(CONFIG_USER_ONLY)
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#include "mmu.h"
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