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tcg: Replace asserts on tcg_jmp_insn_offset

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Test TCG_TARGET_HAS_direct_jump instead of testing an
implementation pointer.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2022-11-26 15:09:00 -08:00
parent 1ce41e0443
commit 7f83167c61
6 changed files with 6 additions and 6 deletions
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2
tcg/aarch64/tcg-target.c.inc
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@ -1918,7 +1918,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
switch (opc) { switch (opc) {
case INDEX_op_goto_tb: case INDEX_op_goto_tb:
tcg_debug_assert(s->tb_jmp_insn_offset != NULL); qemu_build_assert(TCG_TARGET_HAS_direct_jump);
/* /*
* Ensure that ADRP+ADD are 8-byte aligned so that an atomic * Ensure that ADRP+ADD are 8-byte aligned so that an atomic
* write can be used to patch the target address. * write can be used to patch the target address.

2
tcg/arm/tcg-target.c.inc
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@ -1953,7 +1953,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
intptr_t ptr, dif, dil; intptr_t ptr, dif, dil;
TCGReg base = TCG_REG_PC; TCGReg base = TCG_REG_PC;
tcg_debug_assert(s->tb_jmp_insn_offset == 0); qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
ptr = (intptr_t)tcg_splitwx_to_rx(s->tb_jmp_target_addr + args[0]); ptr = (intptr_t)tcg_splitwx_to_rx(s->tb_jmp_target_addr + args[0]);
dif = tcg_pcrel_diff(s, (void *)ptr) - 8; dif = tcg_pcrel_diff(s, (void *)ptr) - 8;
dil = sextract32(dif, 0, 12); dil = sextract32(dif, 0, 12);

2
tcg/loongarch64/tcg-target.c.inc
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@ -1090,7 +1090,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
switch (opc) { switch (opc) {
case INDEX_op_goto_tb: case INDEX_op_goto_tb:
tcg_debug_assert(s->tb_jmp_insn_offset != NULL); qemu_build_assert(TCG_TARGET_HAS_direct_jump);
/* /*
* Ensure that patch area is 8-byte aligned so that an * Ensure that patch area is 8-byte aligned so that an
* atomic write can be used to patch the target address. * atomic write can be used to patch the target address.

2
tcg/mips/tcg-target.c.inc
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@ -1987,7 +1987,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
switch (opc) { switch (opc) {
case INDEX_op_goto_tb: case INDEX_op_goto_tb:
/* indirect jump method */ /* indirect jump method */
tcg_debug_assert(s->tb_jmp_insn_offset == 0); qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP0, TCG_REG_ZERO, tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP0, TCG_REG_ZERO,
(uintptr_t)(s->tb_jmp_target_addr + a0)); (uintptr_t)(s->tb_jmp_target_addr + a0));
tcg_out_opc_reg(s, OPC_JR, 0, TCG_TMP0, 0); tcg_out_opc_reg(s, OPC_JR, 0, TCG_TMP0, 0);

2
tcg/riscv/tcg-target.c.inc
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@ -1311,7 +1311,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
switch (opc) { switch (opc) {
case INDEX_op_goto_tb: case INDEX_op_goto_tb:
assert(s->tb_jmp_insn_offset == 0); qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
/* indirect jump method */ /* indirect jump method */
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_REG_ZERO, tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_REG_ZERO,
(uintptr_t)(s->tb_jmp_target_addr + a0)); (uintptr_t)(s->tb_jmp_target_addr + a0));

2
tcg/tci/tcg-target.c.inc
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@ -603,7 +603,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
switch (opc) { switch (opc) {
case INDEX_op_goto_tb: case INDEX_op_goto_tb:
tcg_debug_assert(s->tb_jmp_insn_offset == 0); qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
/* indirect jump method. */ /* indirect jump method. */
tcg_out_op_p(s, opc, s->tb_jmp_target_addr + args[0]); tcg_out_op_p(s, opc, s->tb_jmp_target_addr + args[0]);
set_jmp_reset_offset(s, args[0]); set_jmp_reset_offset(s, args[0]);