target/hppa: Pass DisasContext to copy_iaoq_entry

Interface change only, no functional effect.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-26 18:34:01 -07:00
parent 698240d19b
commit 741322f471

View File

@ -717,7 +717,8 @@ static target_ureg gva_offset_mask(DisasContext *ctx)
: MAKE_64BIT_MASK(0, 32)); : MAKE_64BIT_MASK(0, 32));
} }
static void copy_iaoq_entry(TCGv_reg dest, target_ureg ival, TCGv_reg vval) static void copy_iaoq_entry(DisasContext *ctx, TCGv_reg dest,
target_ureg ival, TCGv_reg vval)
{ {
if (unlikely(ival == -1)) { if (unlikely(ival == -1)) {
tcg_gen_mov_reg(dest, vval); tcg_gen_mov_reg(dest, vval);
@ -738,8 +739,8 @@ static void gen_excp_1(int exception)
static void gen_excp(DisasContext *ctx, int exception) static void gen_excp(DisasContext *ctx, int exception)
{ {
copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_f, cpu_iaoq_f); copy_iaoq_entry(ctx, cpu_iaoq_f, ctx->iaoq_f, cpu_iaoq_f);
copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_b, cpu_iaoq_b); copy_iaoq_entry(ctx, cpu_iaoq_b, ctx->iaoq_b, cpu_iaoq_b);
nullify_save(ctx); nullify_save(ctx);
gen_excp_1(exception); gen_excp_1(exception);
ctx->base.is_jmp = DISAS_NORETURN; ctx->base.is_jmp = DISAS_NORETURN;
@ -795,8 +796,8 @@ static void gen_goto_tb(DisasContext *ctx, int which,
tcg_gen_movi_reg(cpu_iaoq_b, b); tcg_gen_movi_reg(cpu_iaoq_b, b);
tcg_gen_exit_tb(ctx->base.tb, which); tcg_gen_exit_tb(ctx->base.tb, which);
} else { } else {
copy_iaoq_entry(cpu_iaoq_f, f, cpu_iaoq_b); copy_iaoq_entry(ctx, cpu_iaoq_f, f, cpu_iaoq_b);
copy_iaoq_entry(cpu_iaoq_b, b, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_iaoq_b, b, ctx->iaoq_n_var);
tcg_gen_lookup_and_goto_ptr(); tcg_gen_lookup_and_goto_ptr();
} }
} }
@ -1752,7 +1753,7 @@ static bool do_dbranch(DisasContext *ctx, target_ureg dest,
{ {
if (ctx->null_cond.c == TCG_COND_NEVER && ctx->null_lab == NULL) { if (ctx->null_cond.c == TCG_COND_NEVER && ctx->null_lab == NULL) {
if (link != 0) { if (link != 0) {
copy_iaoq_entry(cpu_gr[link], ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_gr[link], ctx->iaoq_n, ctx->iaoq_n_var);
} }
ctx->iaoq_n = dest; ctx->iaoq_n = dest;
if (is_n) { if (is_n) {
@ -1762,7 +1763,7 @@ static bool do_dbranch(DisasContext *ctx, target_ureg dest,
nullify_over(ctx); nullify_over(ctx);
if (link != 0) { if (link != 0) {
copy_iaoq_entry(cpu_gr[link], ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_gr[link], ctx->iaoq_n, ctx->iaoq_n_var);
} }
if (is_n && use_nullify_skip(ctx)) { if (is_n && use_nullify_skip(ctx)) {
@ -1860,7 +1861,7 @@ static bool do_ibranch(DisasContext *ctx, TCGv_reg dest,
if (ctx->null_cond.c == TCG_COND_NEVER) { if (ctx->null_cond.c == TCG_COND_NEVER) {
if (link != 0) { if (link != 0) {
copy_iaoq_entry(cpu_gr[link], ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_gr[link], ctx->iaoq_n, ctx->iaoq_n_var);
} }
next = tcg_temp_new(); next = tcg_temp_new();
tcg_gen_mov_reg(next, dest); tcg_gen_mov_reg(next, dest);
@ -1906,7 +1907,7 @@ static bool do_ibranch(DisasContext *ctx, TCGv_reg dest,
tmp = tcg_temp_new(); tmp = tcg_temp_new();
next = tcg_temp_new(); next = tcg_temp_new();
copy_iaoq_entry(tmp, ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, tmp, ctx->iaoq_n, ctx->iaoq_n_var);
tcg_gen_movcond_reg(c, next, a0, a1, tmp, dest); tcg_gen_movcond_reg(c, next, a0, a1, tmp, dest);
ctx->iaoq_n = -1; ctx->iaoq_n = -1;
ctx->iaoq_n_var = next; ctx->iaoq_n_var = next;
@ -2643,8 +2644,8 @@ static bool trans_or(DisasContext *ctx, arg_rrr_cf *a)
nullify_over(ctx); nullify_over(ctx);
/* Advance the instruction queue. */ /* Advance the instruction queue. */
copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b); copy_iaoq_entry(ctx, cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b);
copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var);
nullify_set(ctx, 0); nullify_set(ctx, 0);
/* Tell the qemu main loop to halt until this cpu has work. */ /* Tell the qemu main loop to halt until this cpu has work. */
@ -3433,7 +3434,7 @@ static bool trans_be(DisasContext *ctx, arg_be *a)
load_spr(ctx, new_spc, a->sp); load_spr(ctx, new_spc, a->sp);
if (a->l) { if (a->l) {
copy_iaoq_entry(cpu_gr[31], ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_gr[31], ctx->iaoq_n, ctx->iaoq_n_var);
tcg_gen_mov_i64(cpu_sr[0], cpu_iasq_f); tcg_gen_mov_i64(cpu_sr[0], cpu_iasq_f);
} }
if (a->n && use_nullify_skip(ctx)) { if (a->n && use_nullify_skip(ctx)) {
@ -3442,7 +3443,7 @@ static bool trans_be(DisasContext *ctx, arg_be *a)
tcg_gen_mov_i64(cpu_iasq_f, new_spc); tcg_gen_mov_i64(cpu_iasq_f, new_spc);
tcg_gen_mov_i64(cpu_iasq_b, cpu_iasq_f); tcg_gen_mov_i64(cpu_iasq_b, cpu_iasq_f);
} else { } else {
copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b); copy_iaoq_entry(ctx, cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b);
if (ctx->iaoq_b == -1) { if (ctx->iaoq_b == -1) {
tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b); tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b);
} }
@ -3556,14 +3557,14 @@ static bool trans_bve(DisasContext *ctx, arg_bve *a)
nullify_over(ctx); nullify_over(ctx);
dest = do_ibranch_priv(ctx, load_gpr(ctx, a->b)); dest = do_ibranch_priv(ctx, load_gpr(ctx, a->b));
copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b); copy_iaoq_entry(ctx, cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b);
if (ctx->iaoq_b == -1) { if (ctx->iaoq_b == -1) {
tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b); tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b);
} }
copy_iaoq_entry(cpu_iaoq_b, -1, dest); copy_iaoq_entry(ctx, cpu_iaoq_b, -1, dest);
tcg_gen_mov_i64(cpu_iasq_b, space_select(ctx, 0, dest)); tcg_gen_mov_i64(cpu_iasq_b, space_select(ctx, 0, dest));
if (a->l) { if (a->l) {
copy_iaoq_entry(cpu_gr[a->l], ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_gr[a->l], ctx->iaoq_n, ctx->iaoq_n_var);
} }
nullify_set(ctx, a->n); nullify_set(ctx, a->n);
tcg_gen_lookup_and_goto_ptr(); tcg_gen_lookup_and_goto_ptr();
@ -4218,7 +4219,7 @@ static void hppa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
case DISAS_IAQ_N_STALE_EXIT: case DISAS_IAQ_N_STALE_EXIT:
if (ctx->iaoq_f == -1) { if (ctx->iaoq_f == -1) {
tcg_gen_mov_reg(cpu_iaoq_f, cpu_iaoq_b); tcg_gen_mov_reg(cpu_iaoq_f, cpu_iaoq_b);
copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var); copy_iaoq_entry(ctx, cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var);
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b); tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b);
#endif #endif
@ -4247,8 +4248,8 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
case DISAS_TOO_MANY: case DISAS_TOO_MANY:
case DISAS_IAQ_N_STALE: case DISAS_IAQ_N_STALE:
case DISAS_IAQ_N_STALE_EXIT: case DISAS_IAQ_N_STALE_EXIT:
copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_f, cpu_iaoq_f); copy_iaoq_entry(ctx, cpu_iaoq_f, ctx->iaoq_f, cpu_iaoq_f);
copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_b, cpu_iaoq_b); copy_iaoq_entry(ctx, cpu_iaoq_b, ctx->iaoq_b, cpu_iaoq_b);
nullify_save(ctx); nullify_save(ctx);
/* FALLTHRU */ /* FALLTHRU */
case DISAS_IAQ_N_UPDATED: case DISAS_IAQ_N_UPDATED: