yannick.naumann/RT-Task-Generator-QEMU
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target/loongarch: Add preldx instruction

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Resolve the issue of starting the Loongnix 20.5[1] system failure.

Logs:
    Loading Linux 4.19.0-19-loongson-3 ...
    Loading initial ramdisk ...
    PROGRESS CODE: V02010004 I0
    PROGRESS CODE: V03101019 I0
    Error: unknown opcode. 90000000003a3e6c: 0x382c6d82

[1] http://pkg.loongnix.cn/loongnix/isos/Loongnix-20.5/Loongnix-20.5.cartoon.gui.loongarch64.en.qcow2

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230905123910.3052023-1-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2023-09-05 20:39:10 +08:00
parent 32f4916cfb
commit 5f1a3132c6
3 changed files with 15 additions and 0 deletions
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7
target/loongarch/disas.c
View File

@ -190,6 +190,12 @@ static void output_hint_r_i(DisasContext *ctx, arg_hint_r_i *a,
output(ctx, mnemonic, "%d, r%d, %d", a->hint, a->rj, a->imm); output(ctx, mnemonic, "%d, r%d, %d", a->hint, a->rj, a->imm);
} }
static void output_hint_rr(DisasContext *ctx, arg_hint_rr *a,
const char *mnemonic)
{
output(ctx, mnemonic, "%d, r%d, r%d", a->hint, a->rj, a->rk);
}
static void output_i(DisasContext *ctx, arg_i *a, const char *mnemonic) static void output_i(DisasContext *ctx, arg_i *a, const char *mnemonic)
{ {
output(ctx, mnemonic, "%d", a->imm); output(ctx, mnemonic, "%d", a->imm);
@ -549,6 +555,7 @@ INSN(ld_bu, rr_i)
INSN(ld_hu, rr_i) INSN(ld_hu, rr_i)
INSN(ld_wu, rr_i) INSN(ld_wu, rr_i)
INSN(preld, hint_r_i) INSN(preld, hint_r_i)
INSN(preldx, hint_rr)
INSN(fld_s, fr_i) INSN(fld_s, fr_i)
INSN(fst_s, fr_i) INSN(fst_s, fr_i)
INSN(fld_d, fr_i) INSN(fld_d, fr_i)

5
target/loongarch/insn_trans/trans_memory.c.inc
View File

@ -110,6 +110,11 @@ static bool trans_preld(DisasContext *ctx, arg_preld *a)
return true; return true;
} }
static bool trans_preldx(DisasContext *ctx, arg_preldx * a)
{
return true;
}
static bool trans_dbar(DisasContext *ctx, arg_dbar * a) static bool trans_dbar(DisasContext *ctx, arg_dbar * a)
{ {
tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL); tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);

3
target/loongarch/insns.decode
View File

@ -24,6 +24,7 @@
&rrr rd rj rk &rrr rd rj rk
&rr_i rd rj imm &rr_i rd rj imm
&hint_r_i hint rj imm &hint_r_i hint rj imm
&hint_rr hint rj rk
&rrr_sa rd rj rk sa &rrr_sa rd rj rk sa
&rr_ms_ls rd rj ms ls &rr_ms_ls rd rj ms ls
&ff fd fj &ff fd fj
@ -69,6 +70,7 @@
@rr_i16 .... .. imm:s16 rj:5 rd:5 &rr_i @rr_i16 .... .. imm:s16 rj:5 rd:5 &rr_i
@rr_i16s2 .... .. ................ rj:5 rd:5 &rr_i imm=%offs16 @rr_i16s2 .... .. ................ rj:5 rd:5 &rr_i imm=%offs16
@hint_r_i12 .... ...... imm:s12 rj:5 hint:5 &hint_r_i @hint_r_i12 .... ...... imm:s12 rj:5 hint:5 &hint_r_i
@hint_rr .... ........ ..... rk:5 rj:5 hint:5 &hint_rr
@rrr_sa2p1 .... ........ ... .. rk:5 rj:5 rd:5 &rrr_sa sa=%sa2p1 @rrr_sa2p1 .... ........ ... .. rk:5 rj:5 rd:5 &rrr_sa sa=%sa2p1
@rrr_sa2 .... ........ ... sa:2 rk:5 rj:5 rd:5 &rrr_sa @rrr_sa2 .... ........ ... sa:2 rk:5 rj:5 rd:5 &rrr_sa
@rrr_sa3 .... ........ .. sa:3 rk:5 rj:5 rd:5 &rrr_sa @rrr_sa3 .... ........ .. sa:3 rk:5 rj:5 rd:5 &rrr_sa
@ -228,6 +230,7 @@ ldx_bu 0011 10000010 00000 ..... ..... ..... @rrr
ldx_hu 0011 10000010 01000 ..... ..... ..... @rrr ldx_hu 0011 10000010 01000 ..... ..... ..... @rrr
ldx_wu 0011 10000010 10000 ..... ..... ..... @rrr ldx_wu 0011 10000010 10000 ..... ..... ..... @rrr
preld 0010 101011 ............ ..... ..... @hint_r_i12 preld 0010 101011 ............ ..... ..... @hint_r_i12
preldx 0011 10000010 11000 ..... ..... ..... @hint_rr
dbar 0011 10000111 00100 ............... @i15 dbar 0011 10000111 00100 ............... @i15
ibar 0011 10000111 00101 ............... @i15 ibar 0011 10000111 00101 ............... @i15
ldptr_w 0010 0100 .............. ..... ..... @rr_i14s2 ldptr_w 0010 0100 .............. ..... ..... @rr_i14s2