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hw/watchdog/wdt_imx2: Trace MMIO access

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Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231028122415.14869-2-shentey@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Bernhard Beschow 2023-10-28 14:24:10 +02:00 committed by Peter Maydell
parent 7df9a22857
commit 18736a2141
2 changed files with 22 additions and 6 deletions
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4
hw/watchdog/trace-events
View File

@ -17,6 +17,10 @@ cmsdk_apb_watchdog_lock(uint32_t lock) "CMSDK APB watchdog: lock %" PRIu32
aspeed_wdt_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d" aspeed_wdt_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
aspeed_wdt_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRIx64 aspeed_wdt_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRIx64
# wdt_imx2.c
imx2_wdt_read(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] -> 0x%" PRIx16
imx2_wdt_write(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] <- 0x%" PRIx16
# spapr_watchdog.c # spapr_watchdog.c
spapr_watchdog_start(uint64_t flags, uint64_t num, uint64_t timeout) "Flags 0x%" PRIx64 " num=%" PRId64 " %" PRIu64 "ms" spapr_watchdog_start(uint64_t flags, uint64_t num, uint64_t timeout) "Flags 0x%" PRIx64 " num=%" PRId64 " %" PRIu64 "ms"
spapr_watchdog_stop(uint64_t num, uint64_t ret) "num=%" PRIu64 " ret=%" PRId64 spapr_watchdog_stop(uint64_t num, uint64_t ret) "num=%" PRIu64 " ret=%" PRId64

24
hw/watchdog/wdt_imx2.c
View File

@ -17,6 +17,7 @@
#include "hw/qdev-properties.h" #include "hw/qdev-properties.h"
#include "hw/watchdog/wdt_imx2.h" #include "hw/watchdog/wdt_imx2.h"
#include "trace.h"
static void imx2_wdt_interrupt(void *opaque) static void imx2_wdt_interrupt(void *opaque)
{ {
@ -67,20 +68,29 @@ static void imx2_wdt_reset(DeviceState *dev)
static uint64_t imx2_wdt_read(void *opaque, hwaddr addr, unsigned int size) static uint64_t imx2_wdt_read(void *opaque, hwaddr addr, unsigned int size)
{ {
IMX2WdtState *s = IMX2_WDT(opaque); IMX2WdtState *s = IMX2_WDT(opaque);
uint16_t value = 0;
switch (addr) { switch (addr) {
case IMX2_WDT_WCR: case IMX2_WDT_WCR:
return s->wcr; value = s->wcr;
break;
case IMX2_WDT_WSR: case IMX2_WDT_WSR:
return s->wsr; value = s->wsr;
break;
case IMX2_WDT_WRSR: case IMX2_WDT_WRSR:
return s->wrsr; value = s->wrsr;
break;
case IMX2_WDT_WICR: case IMX2_WDT_WICR:
return s->wicr; value = s->wicr;
break;
case IMX2_WDT_WMCR: case IMX2_WDT_WMCR:
return s->wmcr; value = s->wmcr;
break;
} }
return 0;
trace_imx2_wdt_read(addr, value);
return value;
} }
static void imx_wdt2_update_itimer(IMX2WdtState *s, bool start) static void imx_wdt2_update_itimer(IMX2WdtState *s, bool start)
@ -137,6 +147,8 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
{ {
IMX2WdtState *s = IMX2_WDT(opaque); IMX2WdtState *s = IMX2_WDT(opaque);
trace_imx2_wdt_write(addr, value);
switch (addr) { switch (addr) {
case IMX2_WDT_WCR: case IMX2_WDT_WCR:
if (s->wcr_locked) { if (s->wcr_locked) {