tresor.bessoh
/
linuxdebug
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
linuxdebug/tools/perf/pmu-events/arch/powerpc/power8/pipeline.json

351 lines
10 KiB
JSON
Raw Blame History

[
{
"EventCode": "0x100f2",
"EventName": "PM_1PLUS_PPC_CMPL",
"BriefDescription": "1 or more ppc insts finished",
"PublicDescription": "1 or more ppc insts finished (completed)"
},
{
"EventCode": "0x400f2",
"EventName": "PM_1PLUS_PPC_DISP",
"BriefDescription": "Cycles at least one Instr Dispatched",
"PublicDescription": "Cycles at least one Instr Dispatched. Could be a group with only microcode. Issue HW016521"
},
{
"EventCode": "0x100fa",
"EventName": "PM_ANY_THRD_RUN_CYC",
"BriefDescription": "One of threads in run_cycles",
"PublicDescription": "Any thread in run_cycles (was one thread in run_cycles)"
},
{
"EventCode": "0x4000a",
"EventName": "PM_CMPLU_STALL",
"BriefDescription": "Completion stall",
"PublicDescription": ""
},
{
"EventCode": "0x4d018",
"EventName": "PM_CMPLU_STALL_BRU",
"BriefDescription": "Completion stall due to a Branch Unit",
"PublicDescription": ""
},
{
"EventCode": "0x2c012",
"EventName": "PM_CMPLU_STALL_DCACHE_MISS",
"BriefDescription": "Completion stall by Dcache miss",
"PublicDescription": ""
},
{
"EventCode": "0x2c018",
"EventName": "PM_CMPLU_STALL_DMISS_L21_L31",
"BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)",
"PublicDescription": ""
},
{
"EventCode": "0x2c016",
"EventName": "PM_CMPLU_STALL_DMISS_L2L3",
"BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3",
"PublicDescription": ""
},
{
"EventCode": "0x4c016",
"EventName": "PM_CMPLU_STALL_DMISS_L2L3_CONFLICT",
"BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a conflict",
"PublicDescription": "Completion stall due to cache miss resolving in core's L2/L3 with a conflict"
},
{
"EventCode": "0x4c01a",
"EventName": "PM_CMPLU_STALL_DMISS_L3MISS",
"BriefDescription": "Completion stall due to cache miss resolving missed the L3",
"PublicDescription": ""
},
{
"EventCode": "0x4c018",
"EventName": "PM_CMPLU_STALL_DMISS_LMEM",
"BriefDescription": "Completion stall due to cache miss that resolves in local memory",
"PublicDescription": "Completion stall due to cache miss resolving in core's Local Memory"
},
{
"EventCode": "0x2c01c",
"EventName": "PM_CMPLU_STALL_DMISS_REMOTE",
"BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or memory)",
"PublicDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)"
},
{
"EventCode": "0x4c012",
"EventName": "PM_CMPLU_STALL_ERAT_MISS",
"BriefDescription": "Completion stall due to LSU reject ERAT miss",
"PublicDescription": ""
},
{
"EventCode": "0x4d016",
"EventName": "PM_CMPLU_STALL_FXLONG",
"BriefDescription": "Completion stall due to a long latency fixed point instruction",
"PublicDescription": ""
},
{
"EventCode": "0x2d016",
"EventName": "PM_CMPLU_STALL_FXU",
"BriefDescription": "Completion stall due to FXU",
"PublicDescription": ""
},
{
"EventCode": "0x30036",
"EventName": "PM_CMPLU_STALL_HWSYNC",
"BriefDescription": "completion stall due to hwsync",
"PublicDescription": ""
},
{
"EventCode": "0x4d014",
"EventName": "PM_CMPLU_STALL_LOAD_FINISH",
"BriefDescription": "Completion stall due to a Load finish",
"PublicDescription": ""
},
{
"EventCode": "0x2c010",
"EventName": "PM_CMPLU_STALL_LSU",
"BriefDescription": "Completion stall by LSU instruction",
"PublicDescription": ""
},
{
"EventCode": "0x10036",
"EventName": "PM_CMPLU_STALL_LWSYNC",
"BriefDescription": "completion stall due to isync/lwsync",
"PublicDescription": ""
},
{
"EventCode": "0x30006",
"EventName": "PM_CMPLU_STALL_OTHER_CMPL",
"BriefDescription": "Instructions core completed while this tread was stalled",
"PublicDescription": "Instructions core completed while this thread was stalled"
},
{
"EventCode": "0x4c01c",
"EventName": "PM_CMPLU_STALL_ST_FWD",
"BriefDescription": "Completion stall due to store forward",
"PublicDescription": ""
},
{
"EventCode": "0x1001c",
"EventName": "PM_CMPLU_STALL_THRD",
"BriefDescription": "Completion Stalled due to thread conflict. Group ready to complete but it was another thread's turn",
"PublicDescription": "Completion stall due to thread conflict"
},
{
"EventCode": "0x1e",
"EventName": "PM_CYC",
"BriefDescription": "Cycles",
"PublicDescription": ""
},
{
"EventCode": "0x10006",
"EventName": "PM_DISP_HELD",
"BriefDescription": "Dispatch Held",
"PublicDescription": ""
},
{
"EventCode": "0x4003c",
"EventName": "PM_DISP_HELD_SYNC_HOLD",
"BriefDescription": "Dispatch held due to SYNC hold",
"PublicDescription": ""
},
{
"EventCode": "0x200f8",
"EventName": "PM_EXT_INT",
"BriefDescription": "external interrupt",
"PublicDescription": ""
},
{
"EventCode": "0x400f8",
"EventName": "PM_FLUSH",
"BriefDescription": "Flush (any type)",
"PublicDescription": ""
},
{
"EventCode": "0x30012",
"EventName": "PM_FLUSH_COMPLETION",
"BriefDescription": "Completion Flush",
"PublicDescription": ""
},
{
"EventCode": "0x3000c",
"EventName": "PM_FREQ_DOWN",
"BriefDescription": "Power Management: Below Threshold B",
"PublicDescription": "Frequency is being slewed down due to Power Management"
},
{
"EventCode": "0x4000c",
"EventName": "PM_FREQ_UP",
"BriefDescription": "Power Management: Above Threshold A",
"PublicDescription": "Frequency is being slewed up due to Power Management"
},
{
"EventCode": "0x2000a",
"EventName": "PM_HV_CYC",
"BriefDescription": "Cycles in which msr_hv is high. Note that this event does not take msr_pr into consideration",
"PublicDescription": "cycles in hypervisor mode"
},
{
"EventCode": "0x3405e",
"EventName": "PM_IFETCH_THROTTLE",
"BriefDescription": "Cycles in which Instruction fetch throttle was active",
"PublicDescription": "Cycles instruction fecth was throttled in IFU"
},
{
"EventCode": "0x10014",
"EventName": "PM_IOPS_CMPL",
"BriefDescription": "Internal Operations completed",
"PublicDescription": "IOPS Completed"
},
{
"EventCode": "0x3c058",
"EventName": "PM_LARX_FIN",
"BriefDescription": "Larx finished",
"PublicDescription": ""
},
{
"EventCode": "0x1002e",
"EventName": "PM_LD_CMPL",
"BriefDescription": "count of Loads completed",
"PublicDescription": ""
},
{
"EventCode": "0x10062",
"EventName": "PM_LD_L3MISS_PEND_CYC",
"BriefDescription": "Cycles L3 miss was pending for this thread",
"PublicDescription": ""
},
{
"EventCode": "0x30066",
"EventName": "PM_LSU_FIN",
"BriefDescription": "LSU Finished an instruction (up to 2 per cycle)",
"PublicDescription": ""
},
{
"EventCode": "0x2003e",
"EventName": "PM_LSU_LMQ_SRQ_EMPTY_CYC",
"BriefDescription": "LSU empty (lmq and srq empty)",
"PublicDescription": ""
},
{
"EventCode": "0x2e05c",
"EventName": "PM_LSU_REJECT_ERAT_MISS",
"BriefDescription": "LSU Reject due to ERAT (up to 4 per cycles)",
"PublicDescription": ""
},
{
"EventCode": "0x4e05c",
"EventName": "PM_LSU_REJECT_LHS",
"BriefDescription": "LSU Reject due to LHS (up to 4 per cycle)",
"PublicDescription": ""
},
{
"EventCode": "0x1e05c",
"EventName": "PM_LSU_REJECT_LMQ_FULL",
"BriefDescription": "LSU reject due to LMQ full ( 4 per cycle)",
"PublicDescription": ""
},
{
"EventCode": "0x1001a",
"EventName": "PM_LSU_SRQ_FULL_CYC",
"BriefDescription": "Storage Queue is full and is blocking dispatch",
"PublicDescription": "SRQ is Full"
},
{
"EventCode": "0x40014",
"EventName": "PM_PROBE_NOP_DISP",
"BriefDescription": "ProbeNops dispatched",
"PublicDescription": ""
},
{
"EventCode": "0x600f4",
"EventName": "PM_RUN_CYC",
"BriefDescription": "Run_cycles",
"PublicDescription": ""
},
{
"EventCode": "0x3006c",
"EventName": "PM_RUN_CYC_SMT2_MODE",
"BriefDescription": "Cycles run latch is set and core is in SMT2 mode",
"PublicDescription": ""
},
{
"EventCode": "0x2006c",
"EventName": "PM_RUN_CYC_SMT4_MODE",
"BriefDescription": "cycles this threads run latch is set and the core is in SMT4 mode",
"PublicDescription": "Cycles run latch is set and core is in SMT4 mode"
},
{
"EventCode": "0x1006c",
"EventName": "PM_RUN_CYC_ST_MODE",
"BriefDescription": "Cycles run latch is set and core is in ST mode",
"PublicDescription": ""
},
{
"EventCode": "0x500fa",
"EventName": "PM_RUN_INST_CMPL",
"BriefDescription": "Run_Instructions",
"PublicDescription": ""
},
{
"EventCode": "0x1e058",
"EventName": "PM_STCX_FAIL",
"BriefDescription": "stcx failed",
"PublicDescription": ""
},
{
"EventCode": "0x20016",
"EventName": "PM_ST_CMPL",
"BriefDescription": "Store completion count",
"PublicDescription": ""
},
{
"EventCode": "0x200f0",
"EventName": "PM_ST_FIN",
"BriefDescription": "Store Instructions Finished",
"PublicDescription": "Store Instructions Finished (store sent to nest)"
},
{
"EventCode": "0x20018",
"EventName": "PM_ST_FWD",
"BriefDescription": "Store forwards that finished",
"PublicDescription": ""
},
{
"EventCode": "0x10026",
"EventName": "PM_TABLEWALK_CYC",
"BriefDescription": "Cycles when a tablewalk (I or D) is active",
"PublicDescription": "Tablewalk Active"
},
{
"EventCode": "0x300f8",
"EventName": "PM_TB_BIT_TRANS",
"BriefDescription": "timebase event",
"PublicDescription": ""
},
{
"EventCode": "0x2000c",
"EventName": "PM_THRD_ALL_RUN_CYC",
"BriefDescription": "All Threads in Run_cycles (was both threads in run_cycles)",
"PublicDescription": ""
},
{
"EventCode": "0x30058",
"EventName": "PM_TLBIE_FIN",
"BriefDescription": "tlbie finished",
"PublicDescription": ""
},
{
"EventCode": "0x10060",
"EventName": "PM_TM_TRANS_RUN_CYC",
"BriefDescription": "run cycles in transactional state",
"PublicDescription": ""
},
{
"EventCode": "0x2e012",
"EventName": "PM_TM_TX_PASS_RUN_CYC",
"BriefDescription": "cycles spent in successful transactions",
"PublicDescription": "run cycles spent in successful transactions"
}
]
Reference in New Issue View Git Blame Copy Permalink