165 lines
6.7 KiB
C
165 lines
6.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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/*
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* i2c.h - definitions for the I2C bus interface
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*
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* Copyright (C) 1995-2000 Simon G. Vogl
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* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
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* Frodo Looijaard <frodol@dds.nl>
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*/
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#ifndef _UAPI_LINUX_I2C_H
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#define _UAPI_LINUX_I2C_H
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#include <linux/types.h>
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/**
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* struct i2c_msg - an I2C transaction segment beginning with START
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*
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* @addr: Slave address, either 7 or 10 bits. When this is a 10 bit address,
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* %I2C_M_TEN must be set in @flags and the adapter must support
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* %I2C_FUNC_10BIT_ADDR.
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*
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* @flags:
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* Supported by all adapters:
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* %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
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*
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* Optional:
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* %I2C_M_DMA_SAFE: the buffer of this message is DMA safe. Makes only sense
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* in kernelspace, because userspace buffers are copied anyway
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*
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* Only if I2C_FUNC_10BIT_ADDR is set:
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* %I2C_M_TEN: this is a 10 bit chip address
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*
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* Only if I2C_FUNC_SMBUS_READ_BLOCK_DATA is set:
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* %I2C_M_RECV_LEN: message length will be first received byte
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*
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* Only if I2C_FUNC_NOSTART is set:
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* %I2C_M_NOSTART: skip repeated start sequence
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* Only if I2C_FUNC_PROTOCOL_MANGLING is set:
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* %I2C_M_NO_RD_ACK: in a read message, master ACK/NACK bit is skipped
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* %I2C_M_IGNORE_NAK: treat NACK from client as ACK
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* %I2C_M_REV_DIR_ADDR: toggles the Rd/Wr bit
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* %I2C_M_STOP: force a STOP condition after the message
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*
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* @len: Number of data bytes in @buf being read from or written to the I2C
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* slave address. For read transactions where %I2C_M_RECV_LEN is set, the
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* caller guarantees that this buffer can hold up to %I2C_SMBUS_BLOCK_MAX
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* bytes in addition to the initial length byte sent by the slave (plus,
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* if used, the SMBus PEC); and this value will be incremented by the number
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* of block data bytes received.
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*
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* @buf: The buffer into which data is read, or from which it's written.
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*
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* An i2c_msg is the low level representation of one segment of an I2C
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* transaction. It is visible to drivers in the @i2c_transfer() procedure,
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* to userspace from i2c-dev, and to I2C adapter drivers through the
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* @i2c_adapter.@master_xfer() method.
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*
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* Except when I2C "protocol mangling" is used, all I2C adapters implement
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* the standard rules for I2C transactions. Each transaction begins with a
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* START. That is followed by the slave address, and a bit encoding read
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* versus write. Then follow all the data bytes, possibly including a byte
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* with SMBus PEC. The transfer terminates with a NAK, or when all those
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* bytes have been transferred and ACKed. If this is the last message in a
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* group, it is followed by a STOP. Otherwise it is followed by the next
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* @i2c_msg transaction segment, beginning with a (repeated) START.
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*
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* Alternatively, when the adapter supports %I2C_FUNC_PROTOCOL_MANGLING then
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* passing certain @flags may have changed those standard protocol behaviors.
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* Those flags are only for use with broken/nonconforming slaves, and with
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* adapters which are known to support the specific mangling options they need.
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*/
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struct i2c_msg {
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__u16 addr;
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__u16 flags;
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#define I2C_M_RD 0x0001 /* guaranteed to be 0x0001! */
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#define I2C_M_TEN 0x0010 /* use only if I2C_FUNC_10BIT_ADDR */
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#define I2C_M_DMA_SAFE 0x0200 /* use only in kernel space */
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#define I2C_M_RECV_LEN 0x0400 /* use only if I2C_FUNC_SMBUS_READ_BLOCK_DATA */
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#define I2C_M_NO_RD_ACK 0x0800 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_IGNORE_NAK 0x1000 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_REV_DIR_ADDR 0x2000 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_NOSTART 0x4000 /* use only if I2C_FUNC_NOSTART */
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#define I2C_M_STOP 0x8000 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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__u16 len;
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__u8 *buf;
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};
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/* To determine what functionality is present */
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#define I2C_FUNC_I2C 0x00000001
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#define I2C_FUNC_10BIT_ADDR 0x00000002 /* required for I2C_M_TEN */
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#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* required for I2C_M_IGNORE_NAK etc. */
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#define I2C_FUNC_SMBUS_PEC 0x00000008
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#define I2C_FUNC_NOSTART 0x00000010 /* required for I2C_M_NOSTART */
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#define I2C_FUNC_SLAVE 0x00000020
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#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 or later */
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#define I2C_FUNC_SMBUS_QUICK 0x00010000
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#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
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#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
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#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
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#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
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#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
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#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
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#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
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#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 /* required for I2C_M_RECV_LEN */
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#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
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#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
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#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
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#define I2C_FUNC_SMBUS_HOST_NOTIFY 0x10000000 /* SMBus 2.0 or later */
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#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
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I2C_FUNC_SMBUS_WRITE_BYTE)
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#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \
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I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
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#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \
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I2C_FUNC_SMBUS_WRITE_WORD_DATA)
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#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
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I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
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#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
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I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
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#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
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I2C_FUNC_SMBUS_BYTE | \
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I2C_FUNC_SMBUS_BYTE_DATA | \
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I2C_FUNC_SMBUS_WORD_DATA | \
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I2C_FUNC_SMBUS_PROC_CALL | \
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I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
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I2C_FUNC_SMBUS_I2C_BLOCK | \
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I2C_FUNC_SMBUS_PEC)
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/* if I2C_M_RECV_LEN is also supported */
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#define I2C_FUNC_SMBUS_EMUL_ALL (I2C_FUNC_SMBUS_EMUL | \
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I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
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I2C_FUNC_SMBUS_BLOCK_PROC_CALL)
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/*
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* Data for SMBus Messages
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*/
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#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
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union i2c_smbus_data {
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__u8 byte;
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__u16 word;
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__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
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/* and one more for user-space compatibility */
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};
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/* i2c_smbus_xfer read or write markers */
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#define I2C_SMBUS_READ 1
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#define I2C_SMBUS_WRITE 0
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/* SMBus transaction types (size parameter in the above functions)
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Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
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#define I2C_SMBUS_QUICK 0
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#define I2C_SMBUS_BYTE 1
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#define I2C_SMBUS_BYTE_DATA 2
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#define I2C_SMBUS_WORD_DATA 3
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#define I2C_SMBUS_PROC_CALL 4
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#define I2C_SMBUS_BLOCK_DATA 5
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#define I2C_SMBUS_I2C_BLOCK_BROKEN 6
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#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */
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#define I2C_SMBUS_I2C_BLOCK_DATA 8
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#endif /* _UAPI_LINUX_I2C_H */
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