527 lines
14 KiB
C
527 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* intel_pch_thermal.c - Intel PCH Thermal driver
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*
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* Copyright (c) 2015, Intel Corporation.
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*
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* Authors:
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* Tushar Dave <tushar.n.dave@intel.com>
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*/
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#include <linux/acpi.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/pm.h>
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#include <linux/suspend.h>
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#include <linux/thermal.h>
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#include <linux/types.h>
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#include <linux/units.h>
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/* Intel PCH thermal Device IDs */
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#define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */
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#define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */
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#define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */
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#define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */
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#define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */
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#define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */
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#define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */
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#define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */
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#define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */
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#define PCH_THERMAL_DID_LWB 0xA1B1 /* Lewisburg PCH */
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#define PCH_THERMAL_DID_WBG 0x8D24 /* Wellsburg PCH */
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/* Wildcat Point-LP PCH Thermal registers */
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#define WPT_TEMP 0x0000 /* Temperature */
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#define WPT_TSC 0x04 /* Thermal Sensor Control */
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#define WPT_TSS 0x06 /* Thermal Sensor Status */
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#define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */
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#define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */
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#define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */
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#define WPT_CTT 0x0010 /* Catastrophic Trip Point */
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#define WPT_TSPM 0x001C /* Thermal Sensor Power Management */
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#define WPT_TAHV 0x0014 /* Thermal Alert High Value */
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#define WPT_TALV 0x0018 /* Thermal Alert Low Value */
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#define WPT_TL 0x00000040 /* Throttle Value */
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#define WPT_PHL 0x0060 /* PCH Hot Level */
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#define WPT_PHLC 0x62 /* PHL Control */
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#define WPT_TAS 0x80 /* Thermal Alert Status */
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#define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */
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#define WPT_TSGPEN 0x84 /* General Purpose Event Enables */
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/* Wildcat Point-LP PCH Thermal Register bit definitions */
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#define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */
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#define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */
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#define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */
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#define WPT_TSS_GPES 0x08 /* GPE status */
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#define WPT_TSEL_ETS 0x01 /* Enable TS */
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#define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */
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#define WPT_TL_TOL 0x000001FF /* T0 Level */
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#define WPT_TL_T1L 0x1ff00000 /* T1 Level */
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#define WPT_TL_TTEN 0x20000000 /* TT Enable */
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/* Resolution of 1/2 degree C and an offset of -50C */
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#define PCH_TEMP_OFFSET (-50)
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#define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET)
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#define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE)
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#define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET)
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/* Amount of time for each cooling delay, 100ms by default for now */
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static unsigned int delay_timeout = 100;
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module_param(delay_timeout, int, 0644);
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MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration.");
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/* Number of iterations for cooling delay, 600 counts by default for now */
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static unsigned int delay_cnt = 600;
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module_param(delay_cnt, int, 0644);
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MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay.");
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static char driver_name[] = "Intel PCH thermal driver";
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struct pch_thermal_device {
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void __iomem *hw_base;
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const struct pch_dev_ops *ops;
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struct pci_dev *pdev;
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struct thermal_zone_device *tzd;
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int crt_trip_id;
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unsigned long crt_temp;
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int hot_trip_id;
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unsigned long hot_temp;
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int psv_trip_id;
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unsigned long psv_temp;
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bool bios_enabled;
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};
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#ifdef CONFIG_ACPI
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/*
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* On some platforms, there is a companion ACPI device, which adds
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* passive trip temperature using _PSV method. There is no specific
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* passive temperature setting in MMIO interface of this PCI device.
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*/
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static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
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int *nr_trips)
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{
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struct acpi_device *adev;
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ptd->psv_trip_id = -1;
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adev = ACPI_COMPANION(&ptd->pdev->dev);
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if (adev) {
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unsigned long long r;
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acpi_status status;
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status = acpi_evaluate_integer(adev->handle, "_PSV", NULL,
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&r);
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if (ACPI_SUCCESS(status)) {
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unsigned long trip_temp;
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trip_temp = deci_kelvin_to_millicelsius(r);
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if (trip_temp) {
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ptd->psv_temp = trip_temp;
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ptd->psv_trip_id = *nr_trips;
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++(*nr_trips);
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}
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}
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}
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}
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#else
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static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
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int *nr_trips)
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{
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ptd->psv_trip_id = -1;
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}
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#endif
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static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips)
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{
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u8 tsel;
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u16 trip_temp;
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*nr_trips = 0;
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/* Check if BIOS has already enabled thermal sensor */
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if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) {
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ptd->bios_enabled = true;
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goto read_trips;
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}
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tsel = readb(ptd->hw_base + WPT_TSEL);
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/*
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* When TSEL's Policy Lock-Down bit is 1, TSEL become RO.
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* If so, thermal sensor cannot enable. Bail out.
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*/
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if (tsel & WPT_TSEL_PLDB) {
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dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
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return -ENODEV;
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}
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writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
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if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) {
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dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
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return -ENODEV;
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}
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read_trips:
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ptd->crt_trip_id = -1;
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trip_temp = readw(ptd->hw_base + WPT_CTT);
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trip_temp &= 0x1FF;
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if (trip_temp) {
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ptd->crt_temp = GET_WPT_TEMP(trip_temp);
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ptd->crt_trip_id = 0;
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++(*nr_trips);
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}
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ptd->hot_trip_id = -1;
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trip_temp = readw(ptd->hw_base + WPT_PHL);
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trip_temp &= 0x1FF;
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if (trip_temp) {
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ptd->hot_temp = GET_WPT_TEMP(trip_temp);
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ptd->hot_trip_id = *nr_trips;
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++(*nr_trips);
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}
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pch_wpt_add_acpi_psv_trip(ptd, nr_trips);
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return 0;
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}
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static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp)
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{
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*temp = GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
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return 0;
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}
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/* Cool the PCH when it's overheat in .suspend_noirq phase */
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static int pch_wpt_suspend(struct pch_thermal_device *ptd)
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{
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u8 tsel;
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int pch_delay_cnt = 0;
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u16 pch_thr_temp, pch_cur_temp;
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/* Shutdown the thermal sensor if it is not enabled by BIOS */
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if (!ptd->bios_enabled) {
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tsel = readb(ptd->hw_base + WPT_TSEL);
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writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL);
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return 0;
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}
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/* Do not check temperature if it is not s2idle */
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if (pm_suspend_via_firmware())
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return 0;
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/* Get the PCH temperature threshold value */
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pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM));
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/* Get the PCH current temperature value */
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pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
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/*
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* If current PCH temperature is higher than configured PCH threshold
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* value, run some delay loop with sleep to let the current temperature
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* go down below the threshold value which helps to allow system enter
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* lower power S0ix suspend state. Even after delay loop if PCH current
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* temperature stays above threshold, notify the warning message
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* which helps to indentify the reason why S0ix entry was rejected.
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*/
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while (pch_delay_cnt < delay_cnt) {
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if (pch_cur_temp < pch_thr_temp)
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break;
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if (pm_wakeup_pending()) {
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dev_warn(&ptd->pdev->dev, "Wakeup event detected, abort cooling\n");
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return 0;
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}
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pch_delay_cnt++;
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dev_dbg(&ptd->pdev->dev,
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"CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n",
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pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout);
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msleep(delay_timeout);
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/* Read the PCH current temperature for next cycle. */
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pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
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}
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if (pch_cur_temp >= pch_thr_temp)
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dev_warn(&ptd->pdev->dev,
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"CPU-PCH is hot [%dC] after %d ms delay. S0ix might fail\n",
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pch_cur_temp, pch_delay_cnt * delay_timeout);
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else {
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if (pch_delay_cnt)
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dev_info(&ptd->pdev->dev,
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"CPU-PCH is cool [%dC] after %d ms delay\n",
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pch_cur_temp, pch_delay_cnt * delay_timeout);
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else
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dev_info(&ptd->pdev->dev,
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"CPU-PCH is cool [%dC]\n",
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pch_cur_temp);
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}
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return 0;
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}
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static int pch_wpt_resume(struct pch_thermal_device *ptd)
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{
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u8 tsel;
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if (ptd->bios_enabled)
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return 0;
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tsel = readb(ptd->hw_base + WPT_TSEL);
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writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
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return 0;
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}
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struct pch_dev_ops {
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int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips);
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int (*get_temp)(struct pch_thermal_device *ptd, int *temp);
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int (*suspend)(struct pch_thermal_device *ptd);
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int (*resume)(struct pch_thermal_device *ptd);
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};
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/* dev ops for Wildcat Point */
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static const struct pch_dev_ops pch_dev_ops_wpt = {
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.hw_init = pch_wpt_init,
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.get_temp = pch_wpt_get_temp,
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.suspend = pch_wpt_suspend,
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.resume = pch_wpt_resume,
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};
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static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp)
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{
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struct pch_thermal_device *ptd = tzd->devdata;
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return ptd->ops->get_temp(ptd, temp);
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}
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static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip,
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enum thermal_trip_type *type)
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{
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struct pch_thermal_device *ptd = tzd->devdata;
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if (ptd->crt_trip_id == trip)
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*type = THERMAL_TRIP_CRITICAL;
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else if (ptd->hot_trip_id == trip)
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*type = THERMAL_TRIP_HOT;
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else if (ptd->psv_trip_id == trip)
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*type = THERMAL_TRIP_PASSIVE;
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else
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return -EINVAL;
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return 0;
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}
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static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp)
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{
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struct pch_thermal_device *ptd = tzd->devdata;
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if (ptd->crt_trip_id == trip)
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*temp = ptd->crt_temp;
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else if (ptd->hot_trip_id == trip)
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*temp = ptd->hot_temp;
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else if (ptd->psv_trip_id == trip)
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*temp = ptd->psv_temp;
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else
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return -EINVAL;
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return 0;
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}
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static void pch_critical(struct thermal_zone_device *tzd)
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{
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dev_dbg(&tzd->device, "%s: critical temperature reached\n", tzd->type);
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}
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static struct thermal_zone_device_ops tzd_ops = {
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.get_temp = pch_thermal_get_temp,
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.get_trip_type = pch_get_trip_type,
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.get_trip_temp = pch_get_trip_temp,
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.critical = pch_critical,
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};
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enum board_ids {
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board_hsw,
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board_wpt,
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board_skl,
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board_cnl,
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board_cml,
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board_lwb,
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board_wbg,
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};
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static const struct board_info {
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const char *name;
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const struct pch_dev_ops *ops;
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} board_info[] = {
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[board_hsw] = {
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.name = "pch_haswell",
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.ops = &pch_dev_ops_wpt,
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},
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[board_wpt] = {
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.name = "pch_wildcat_point",
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.ops = &pch_dev_ops_wpt,
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},
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[board_skl] = {
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.name = "pch_skylake",
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.ops = &pch_dev_ops_wpt,
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},
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[board_cnl] = {
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.name = "pch_cannonlake",
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.ops = &pch_dev_ops_wpt,
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},
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[board_cml] = {
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.name = "pch_cometlake",
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.ops = &pch_dev_ops_wpt,
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},
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[board_lwb] = {
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.name = "pch_lewisburg",
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.ops = &pch_dev_ops_wpt,
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},
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[board_wbg] = {
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.name = "pch_wellsburg",
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.ops = &pch_dev_ops_wpt,
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},
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};
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static int intel_pch_thermal_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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enum board_ids board_id = id->driver_data;
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const struct board_info *bi = &board_info[board_id];
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struct pch_thermal_device *ptd;
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int err;
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int nr_trips;
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ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL);
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if (!ptd)
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return -ENOMEM;
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ptd->ops = bi->ops;
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pci_set_drvdata(pdev, ptd);
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ptd->pdev = pdev;
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err = pci_enable_device(pdev);
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if (err) {
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dev_err(&pdev->dev, "failed to enable pci device\n");
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return err;
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}
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err = pci_request_regions(pdev, driver_name);
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if (err) {
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dev_err(&pdev->dev, "failed to request pci region\n");
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goto error_disable;
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}
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ptd->hw_base = pci_ioremap_bar(pdev, 0);
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if (!ptd->hw_base) {
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err = -ENOMEM;
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dev_err(&pdev->dev, "failed to map mem base\n");
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goto error_release;
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}
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err = ptd->ops->hw_init(ptd, &nr_trips);
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if (err)
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goto error_cleanup;
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ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd,
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&tzd_ops, NULL, 0, 0);
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if (IS_ERR(ptd->tzd)) {
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dev_err(&pdev->dev, "Failed to register thermal zone %s\n",
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bi->name);
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err = PTR_ERR(ptd->tzd);
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goto error_cleanup;
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}
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err = thermal_zone_device_enable(ptd->tzd);
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if (err)
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goto err_unregister;
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return 0;
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err_unregister:
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thermal_zone_device_unregister(ptd->tzd);
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error_cleanup:
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iounmap(ptd->hw_base);
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error_release:
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pci_release_regions(pdev);
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error_disable:
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pci_disable_device(pdev);
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dev_err(&pdev->dev, "pci device failed to probe\n");
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return err;
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}
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static void intel_pch_thermal_remove(struct pci_dev *pdev)
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{
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struct pch_thermal_device *ptd = pci_get_drvdata(pdev);
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thermal_zone_device_unregister(ptd->tzd);
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iounmap(ptd->hw_base);
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pci_set_drvdata(pdev, NULL);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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}
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static int intel_pch_thermal_suspend_noirq(struct device *device)
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{
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struct pch_thermal_device *ptd = dev_get_drvdata(device);
|
|
|
|
return ptd->ops->suspend(ptd);
|
|
}
|
|
|
|
static int intel_pch_thermal_resume(struct device *device)
|
|
{
|
|
struct pch_thermal_device *ptd = dev_get_drvdata(device);
|
|
|
|
return ptd->ops->resume(ptd);
|
|
}
|
|
|
|
static const struct pci_device_id intel_pch_thermal_id[] = {
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1),
|
|
.driver_data = board_hsw, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2),
|
|
.driver_data = board_hsw, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT),
|
|
.driver_data = board_wpt, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL),
|
|
.driver_data = board_skl, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H),
|
|
.driver_data = board_skl, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL),
|
|
.driver_data = board_cnl, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H),
|
|
.driver_data = board_cnl, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP),
|
|
.driver_data = board_cnl, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H),
|
|
.driver_data = board_cml, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB),
|
|
.driver_data = board_lwb, },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WBG),
|
|
.driver_data = board_wbg, },
|
|
{ 0, },
|
|
};
|
|
MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id);
|
|
|
|
static const struct dev_pm_ops intel_pch_pm_ops = {
|
|
.suspend_noirq = intel_pch_thermal_suspend_noirq,
|
|
.resume = intel_pch_thermal_resume,
|
|
};
|
|
|
|
static struct pci_driver intel_pch_thermal_driver = {
|
|
.name = "intel_pch_thermal",
|
|
.id_table = intel_pch_thermal_id,
|
|
.probe = intel_pch_thermal_probe,
|
|
.remove = intel_pch_thermal_remove,
|
|
.driver.pm = &intel_pch_pm_ops,
|
|
};
|
|
|
|
module_pci_driver(intel_pch_thermal_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("Intel PCH Thermal driver");
|