591 lines
14 KiB
C
591 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel Software Defined Silicon driver
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*
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* Copyright (c) 2022, Intel Corporation.
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* All Rights Reserved.
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*
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* Author: "David E. Box" <david.e.box@linux.intel.com>
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*/
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#include <linux/auxiliary_bus.h>
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#include <linux/bits.h>
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#include <linux/bitfield.h>
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#include <linux/device.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <linux/uaccess.h>
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#include "vsec.h"
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#define ACCESS_TYPE_BARID 2
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#define ACCESS_TYPE_LOCAL 3
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#define SDSI_MIN_SIZE_DWORDS 276
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#define SDSI_SIZE_CONTROL 8
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#define SDSI_SIZE_MAILBOX 1024
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#define SDSI_SIZE_REGS 72
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#define SDSI_SIZE_CMD sizeof(u64)
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/*
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* Write messages are currently up to the size of the mailbox
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* while read messages are up to 4 times the size of the
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* mailbox, sent in packets
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*/
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#define SDSI_SIZE_WRITE_MSG SDSI_SIZE_MAILBOX
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#define SDSI_SIZE_READ_MSG (SDSI_SIZE_MAILBOX * 4)
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#define SDSI_ENABLED_FEATURES_OFFSET 16
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#define SDSI_ENABLED BIT(3)
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#define SDSI_SOCKET_ID_OFFSET 64
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#define SDSI_SOCKET_ID GENMASK(3, 0)
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#define SDSI_MBOX_CMD_SUCCESS 0x40
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#define SDSI_MBOX_CMD_TIMEOUT 0x80
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#define MBOX_TIMEOUT_US 2000
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#define MBOX_TIMEOUT_ACQUIRE_US 1000
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#define MBOX_POLLING_PERIOD_US 100
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#define MBOX_ACQUIRE_NUM_RETRIES 5
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#define MBOX_ACQUIRE_RETRY_DELAY_MS 500
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#define MBOX_MAX_PACKETS 4
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#define MBOX_OWNER_NONE 0x00
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#define MBOX_OWNER_INBAND 0x01
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#define CTRL_RUN_BUSY BIT(0)
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#define CTRL_READ_WRITE BIT(1)
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#define CTRL_SOM BIT(2)
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#define CTRL_EOM BIT(3)
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#define CTRL_OWNER GENMASK(5, 4)
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#define CTRL_COMPLETE BIT(6)
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#define CTRL_READY BIT(7)
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#define CTRL_STATUS GENMASK(15, 8)
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#define CTRL_PACKET_SIZE GENMASK(31, 16)
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#define CTRL_MSG_SIZE GENMASK(63, 48)
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#define DISC_TABLE_SIZE 12
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#define DT_ACCESS_TYPE GENMASK(3, 0)
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#define DT_SIZE GENMASK(27, 12)
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#define DT_TBIR GENMASK(2, 0)
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#define DT_OFFSET(v) ((v) & GENMASK(31, 3))
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enum sdsi_command {
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SDSI_CMD_PROVISION_AKC = 0x04,
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SDSI_CMD_PROVISION_CAP = 0x08,
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SDSI_CMD_READ_STATE = 0x10,
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};
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struct sdsi_mbox_info {
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u64 *payload;
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void *buffer;
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int size;
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};
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struct disc_table {
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u32 access_info;
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u32 guid;
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u32 offset;
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};
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struct sdsi_priv {
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struct mutex mb_lock; /* Mailbox access lock */
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struct device *dev;
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void __iomem *control_addr;
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void __iomem *mbox_addr;
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void __iomem *regs_addr;
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u32 guid;
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bool sdsi_enabled;
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};
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/* SDSi mailbox operations must be performed using 64bit mov instructions */
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static __always_inline void
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sdsi_memcpy64_toio(u64 __iomem *to, const u64 *from, size_t count_bytes)
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{
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size_t count = count_bytes / sizeof(*to);
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int i;
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for (i = 0; i < count; i++)
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writeq(from[i], &to[i]);
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}
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static __always_inline void
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sdsi_memcpy64_fromio(u64 *to, const u64 __iomem *from, size_t count_bytes)
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{
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size_t count = count_bytes / sizeof(*to);
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int i;
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for (i = 0; i < count; i++)
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to[i] = readq(&from[i]);
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}
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static inline void sdsi_complete_transaction(struct sdsi_priv *priv)
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{
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u64 control = FIELD_PREP(CTRL_COMPLETE, 1);
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lockdep_assert_held(&priv->mb_lock);
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writeq(control, priv->control_addr);
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}
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static int sdsi_status_to_errno(u32 status)
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{
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switch (status) {
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case SDSI_MBOX_CMD_SUCCESS:
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return 0;
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case SDSI_MBOX_CMD_TIMEOUT:
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return -ETIMEDOUT;
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default:
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return -EIO;
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}
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}
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static int sdsi_mbox_cmd_read(struct sdsi_priv *priv, struct sdsi_mbox_info *info,
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size_t *data_size)
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{
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struct device *dev = priv->dev;
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u32 total, loop, eom, status, message_size;
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u64 control;
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int ret;
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lockdep_assert_held(&priv->mb_lock);
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/* Format and send the read command */
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control = FIELD_PREP(CTRL_EOM, 1) |
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FIELD_PREP(CTRL_SOM, 1) |
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FIELD_PREP(CTRL_RUN_BUSY, 1) |
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FIELD_PREP(CTRL_PACKET_SIZE, info->size);
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writeq(control, priv->control_addr);
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/* For reads, data sizes that are larger than the mailbox size are read in packets. */
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total = 0;
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loop = 0;
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do {
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void *buf = info->buffer + (SDSI_SIZE_MAILBOX * loop);
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u32 packet_size;
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/* Poll on ready bit */
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ret = readq_poll_timeout(priv->control_addr, control, control & CTRL_READY,
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MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_US);
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if (ret)
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break;
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eom = FIELD_GET(CTRL_EOM, control);
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status = FIELD_GET(CTRL_STATUS, control);
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packet_size = FIELD_GET(CTRL_PACKET_SIZE, control);
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message_size = FIELD_GET(CTRL_MSG_SIZE, control);
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ret = sdsi_status_to_errno(status);
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if (ret)
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break;
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/* Only the last packet can be less than the mailbox size. */
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if (!eom && packet_size != SDSI_SIZE_MAILBOX) {
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dev_err(dev, "Invalid packet size\n");
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ret = -EPROTO;
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break;
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}
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if (packet_size > SDSI_SIZE_MAILBOX) {
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dev_err(dev, "Packet size too large\n");
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ret = -EPROTO;
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break;
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}
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sdsi_memcpy64_fromio(buf, priv->mbox_addr, round_up(packet_size, SDSI_SIZE_CMD));
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total += packet_size;
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sdsi_complete_transaction(priv);
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} while (!eom && ++loop < MBOX_MAX_PACKETS);
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if (ret) {
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sdsi_complete_transaction(priv);
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return ret;
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}
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if (!eom) {
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dev_err(dev, "Exceeded read attempts\n");
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return -EPROTO;
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}
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/* Message size check is only valid for multi-packet transfers */
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if (loop && total != message_size)
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dev_warn(dev, "Read count %u differs from expected count %u\n",
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total, message_size);
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*data_size = total;
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return 0;
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}
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static int sdsi_mbox_cmd_write(struct sdsi_priv *priv, struct sdsi_mbox_info *info)
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{
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u64 control;
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u32 status;
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int ret;
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lockdep_assert_held(&priv->mb_lock);
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/* Write rest of the payload */
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sdsi_memcpy64_toio(priv->mbox_addr + SDSI_SIZE_CMD, info->payload + 1,
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info->size - SDSI_SIZE_CMD);
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/* Format and send the write command */
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control = FIELD_PREP(CTRL_EOM, 1) |
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FIELD_PREP(CTRL_SOM, 1) |
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FIELD_PREP(CTRL_RUN_BUSY, 1) |
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FIELD_PREP(CTRL_READ_WRITE, 1) |
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FIELD_PREP(CTRL_PACKET_SIZE, info->size);
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writeq(control, priv->control_addr);
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/* Poll on ready bit */
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ret = readq_poll_timeout(priv->control_addr, control, control & CTRL_READY,
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MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_US);
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if (ret)
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goto release_mbox;
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status = FIELD_GET(CTRL_STATUS, control);
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ret = sdsi_status_to_errno(status);
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release_mbox:
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sdsi_complete_transaction(priv);
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return ret;
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}
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static int sdsi_mbox_acquire(struct sdsi_priv *priv, struct sdsi_mbox_info *info)
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{
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u64 control;
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u32 owner;
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int ret, retries = 0;
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lockdep_assert_held(&priv->mb_lock);
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/* Check mailbox is available */
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control = readq(priv->control_addr);
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owner = FIELD_GET(CTRL_OWNER, control);
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if (owner != MBOX_OWNER_NONE)
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return -EBUSY;
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/*
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* If there has been no recent transaction and no one owns the mailbox,
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* we should acquire it in under 1ms. However, if we've accessed it
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* recently it may take up to 2.1 seconds to acquire it again.
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*/
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do {
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/* Write first qword of payload */
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writeq(info->payload[0], priv->mbox_addr);
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/* Check for ownership */
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ret = readq_poll_timeout(priv->control_addr, control,
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FIELD_GET(CTRL_OWNER, control) == MBOX_OWNER_INBAND,
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MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_ACQUIRE_US);
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if (FIELD_GET(CTRL_OWNER, control) == MBOX_OWNER_NONE &&
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retries++ < MBOX_ACQUIRE_NUM_RETRIES) {
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msleep(MBOX_ACQUIRE_RETRY_DELAY_MS);
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continue;
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}
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/* Either we got it or someone else did. */
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break;
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} while (true);
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return ret;
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}
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static int sdsi_mbox_write(struct sdsi_priv *priv, struct sdsi_mbox_info *info)
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{
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int ret;
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lockdep_assert_held(&priv->mb_lock);
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ret = sdsi_mbox_acquire(priv, info);
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if (ret)
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return ret;
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return sdsi_mbox_cmd_write(priv, info);
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}
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static int sdsi_mbox_read(struct sdsi_priv *priv, struct sdsi_mbox_info *info, size_t *data_size)
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{
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int ret;
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lockdep_assert_held(&priv->mb_lock);
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ret = sdsi_mbox_acquire(priv, info);
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if (ret)
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return ret;
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return sdsi_mbox_cmd_read(priv, info, data_size);
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}
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static ssize_t sdsi_provision(struct sdsi_priv *priv, char *buf, size_t count,
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enum sdsi_command command)
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{
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struct sdsi_mbox_info info;
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int ret;
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if (!priv->sdsi_enabled)
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return -EPERM;
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if (count > (SDSI_SIZE_WRITE_MSG - SDSI_SIZE_CMD))
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return -EOVERFLOW;
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/* Qword aligned message + command qword */
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info.size = round_up(count, SDSI_SIZE_CMD) + SDSI_SIZE_CMD;
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info.payload = kzalloc(info.size, GFP_KERNEL);
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if (!info.payload)
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return -ENOMEM;
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/* Copy message to payload buffer */
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memcpy(info.payload, buf, count);
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/* Command is last qword of payload buffer */
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info.payload[(info.size - SDSI_SIZE_CMD) / SDSI_SIZE_CMD] = command;
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ret = mutex_lock_interruptible(&priv->mb_lock);
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if (ret)
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goto free_payload;
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ret = sdsi_mbox_write(priv, &info);
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mutex_unlock(&priv->mb_lock);
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free_payload:
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kfree(info.payload);
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if (ret)
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return ret;
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return count;
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}
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static ssize_t provision_akc_write(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, char *buf, loff_t off,
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size_t count)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct sdsi_priv *priv = dev_get_drvdata(dev);
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if (off)
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return -ESPIPE;
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return sdsi_provision(priv, buf, count, SDSI_CMD_PROVISION_AKC);
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}
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static BIN_ATTR_WO(provision_akc, SDSI_SIZE_WRITE_MSG);
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static ssize_t provision_cap_write(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, char *buf, loff_t off,
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size_t count)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct sdsi_priv *priv = dev_get_drvdata(dev);
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if (off)
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return -ESPIPE;
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return sdsi_provision(priv, buf, count, SDSI_CMD_PROVISION_CAP);
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}
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static BIN_ATTR_WO(provision_cap, SDSI_SIZE_WRITE_MSG);
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static long state_certificate_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, char *buf, loff_t off,
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size_t count)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct sdsi_priv *priv = dev_get_drvdata(dev);
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u64 command = SDSI_CMD_READ_STATE;
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struct sdsi_mbox_info info;
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size_t size;
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int ret;
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if (!priv->sdsi_enabled)
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return -EPERM;
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if (off)
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return 0;
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/* Buffer for return data */
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info.buffer = kmalloc(SDSI_SIZE_READ_MSG, GFP_KERNEL);
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if (!info.buffer)
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return -ENOMEM;
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info.payload = &command;
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info.size = sizeof(command);
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ret = mutex_lock_interruptible(&priv->mb_lock);
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if (ret)
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goto free_buffer;
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ret = sdsi_mbox_read(priv, &info, &size);
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mutex_unlock(&priv->mb_lock);
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if (ret < 0)
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goto free_buffer;
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if (size > count)
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size = count;
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memcpy(buf, info.buffer, size);
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free_buffer:
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kfree(info.buffer);
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if (ret)
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return ret;
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return size;
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}
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static BIN_ATTR(state_certificate, 0400, state_certificate_read, NULL, SDSI_SIZE_READ_MSG);
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static ssize_t registers_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, char *buf, loff_t off,
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size_t count)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct sdsi_priv *priv = dev_get_drvdata(dev);
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void __iomem *addr = priv->regs_addr;
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memcpy_fromio(buf, addr + off, count);
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return count;
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}
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static BIN_ATTR(registers, 0400, registers_read, NULL, SDSI_SIZE_REGS);
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static struct bin_attribute *sdsi_bin_attrs[] = {
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&bin_attr_registers,
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&bin_attr_state_certificate,
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&bin_attr_provision_akc,
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&bin_attr_provision_cap,
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NULL
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};
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static ssize_t guid_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct sdsi_priv *priv = dev_get_drvdata(dev);
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return sysfs_emit(buf, "0x%x\n", priv->guid);
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}
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static DEVICE_ATTR_RO(guid);
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static struct attribute *sdsi_attrs[] = {
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&dev_attr_guid.attr,
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NULL
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};
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static const struct attribute_group sdsi_group = {
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.attrs = sdsi_attrs,
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.bin_attrs = sdsi_bin_attrs,
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};
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__ATTRIBUTE_GROUPS(sdsi);
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static int sdsi_map_mbox_registers(struct sdsi_priv *priv, struct pci_dev *parent,
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struct disc_table *disc_table, struct resource *disc_res)
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{
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u32 access_type = FIELD_GET(DT_ACCESS_TYPE, disc_table->access_info);
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u32 size = FIELD_GET(DT_SIZE, disc_table->access_info);
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u32 tbir = FIELD_GET(DT_TBIR, disc_table->offset);
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u32 offset = DT_OFFSET(disc_table->offset);
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u32 features_offset;
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struct resource res = {};
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/* Starting location of SDSi MMIO region based on access type */
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switch (access_type) {
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case ACCESS_TYPE_LOCAL:
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if (tbir) {
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dev_err(priv->dev, "Unsupported BAR index %u for access type %u\n",
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tbir, access_type);
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return -EINVAL;
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}
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/*
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* For access_type LOCAL, the base address is as follows:
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* base address = end of discovery region + base offset + 1
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*/
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res.start = disc_res->end + offset + 1;
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break;
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case ACCESS_TYPE_BARID:
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res.start = pci_resource_start(parent, tbir) + offset;
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break;
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default:
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dev_err(priv->dev, "Unrecognized access_type %u\n", access_type);
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return -EINVAL;
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}
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res.end = res.start + size * sizeof(u32) - 1;
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res.flags = IORESOURCE_MEM;
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|
priv->control_addr = devm_ioremap_resource(priv->dev, &res);
|
|
if (IS_ERR(priv->control_addr))
|
|
return PTR_ERR(priv->control_addr);
|
|
|
|
priv->mbox_addr = priv->control_addr + SDSI_SIZE_CONTROL;
|
|
priv->regs_addr = priv->mbox_addr + SDSI_SIZE_MAILBOX;
|
|
|
|
features_offset = readq(priv->regs_addr + SDSI_ENABLED_FEATURES_OFFSET);
|
|
priv->sdsi_enabled = !!(features_offset & SDSI_ENABLED);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sdsi_probe(struct auxiliary_device *auxdev, const struct auxiliary_device_id *id)
|
|
{
|
|
struct intel_vsec_device *intel_cap_dev = auxdev_to_ivdev(auxdev);
|
|
struct disc_table disc_table;
|
|
struct resource *disc_res;
|
|
void __iomem *disc_addr;
|
|
struct sdsi_priv *priv;
|
|
int ret;
|
|
|
|
priv = devm_kzalloc(&auxdev->dev, sizeof(*priv), GFP_KERNEL);
|
|
if (!priv)
|
|
return -ENOMEM;
|
|
|
|
priv->dev = &auxdev->dev;
|
|
mutex_init(&priv->mb_lock);
|
|
auxiliary_set_drvdata(auxdev, priv);
|
|
|
|
/* Get the SDSi discovery table */
|
|
disc_res = &intel_cap_dev->resource[0];
|
|
disc_addr = devm_ioremap_resource(&auxdev->dev, disc_res);
|
|
if (IS_ERR(disc_addr))
|
|
return PTR_ERR(disc_addr);
|
|
|
|
memcpy_fromio(&disc_table, disc_addr, DISC_TABLE_SIZE);
|
|
|
|
priv->guid = disc_table.guid;
|
|
|
|
/* Map the SDSi mailbox registers */
|
|
ret = sdsi_map_mbox_registers(priv, intel_cap_dev->pcidev, &disc_table, disc_res);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct auxiliary_device_id sdsi_aux_id_table[] = {
|
|
{ .name = "intel_vsec.sdsi" },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(auxiliary, sdsi_aux_id_table);
|
|
|
|
static struct auxiliary_driver sdsi_aux_driver = {
|
|
.driver = {
|
|
.dev_groups = sdsi_groups,
|
|
},
|
|
.id_table = sdsi_aux_id_table,
|
|
.probe = sdsi_probe,
|
|
/* No remove. All resources are handled under devm */
|
|
};
|
|
module_auxiliary_driver(sdsi_aux_driver);
|
|
|
|
MODULE_AUTHOR("David E. Box <david.e.box@linux.intel.com>");
|
|
MODULE_DESCRIPTION("Intel Software Defined Silicon driver");
|
|
MODULE_LICENSE("GPL");
|