354 lines
7.5 KiB
C
354 lines
7.5 KiB
C
// SPDX-License-Identifier: ISC
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/* Copyright (C) 2019 MediaTek Inc.
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*
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* Author: Ryder Lee <ryder.lee@mediatek.com>
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* Felix Fietkau <nbd@nbd.name>
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*/
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#include <linux/of.h>
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#include "mt7615.h"
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#include "eeprom.h"
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static int mt7615_efuse_read(struct mt7615_dev *dev, u32 base,
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u16 addr, u8 *data)
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{
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u32 val;
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int i;
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val = mt76_rr(dev, base + MT_EFUSE_CTRL);
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val &= ~(MT_EFUSE_CTRL_AIN | MT_EFUSE_CTRL_MODE);
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val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf);
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val |= MT_EFUSE_CTRL_KICK;
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mt76_wr(dev, base + MT_EFUSE_CTRL, val);
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if (!mt76_poll(dev, base + MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000))
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return -ETIMEDOUT;
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udelay(2);
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val = mt76_rr(dev, base + MT_EFUSE_CTRL);
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if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT ||
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WARN_ON_ONCE(!(val & MT_EFUSE_CTRL_VALID))) {
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memset(data, 0x0, 16);
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return 0;
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}
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for (i = 0; i < 4; i++) {
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val = mt76_rr(dev, base + MT_EFUSE_RDATA(i));
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put_unaligned_le32(val, data + 4 * i);
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}
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return 0;
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}
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static int mt7615_efuse_init(struct mt7615_dev *dev, u32 base)
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{
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int i, len = MT7615_EEPROM_SIZE;
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void *buf;
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u32 val;
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val = mt76_rr(dev, base + MT_EFUSE_BASE_CTRL);
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if (val & MT_EFUSE_BASE_CTRL_EMPTY)
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return 0;
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dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL);
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dev->mt76.otp.size = len;
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if (!dev->mt76.otp.data)
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return -ENOMEM;
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buf = dev->mt76.otp.data;
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for (i = 0; i + 16 <= len; i += 16) {
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int ret;
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ret = mt7615_efuse_read(dev, base, i, buf + i);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int mt7615_eeprom_load(struct mt7615_dev *dev, u32 addr)
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{
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int ret;
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ret = mt76_eeprom_init(&dev->mt76, MT7615_EEPROM_FULL_SIZE);
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if (ret < 0)
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return ret;
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return mt7615_efuse_init(dev, addr);
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}
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static int mt7615_check_eeprom(struct mt76_dev *dev)
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{
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u16 val = get_unaligned_le16(dev->eeprom.data);
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switch (val) {
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case 0x7615:
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case 0x7622:
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case 0x7663:
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return 0;
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default:
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return -EINVAL;
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}
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}
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static void
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mt7615_eeprom_parse_hw_band_cap(struct mt7615_dev *dev)
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{
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u8 val, *eeprom = dev->mt76.eeprom.data;
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if (is_mt7663(&dev->mt76)) {
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/* dual band */
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dev->mphy.cap.has_2ghz = true;
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dev->mphy.cap.has_5ghz = true;
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return;
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}
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if (is_mt7622(&dev->mt76)) {
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/* 2GHz only */
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dev->mphy.cap.has_2ghz = true;
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return;
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}
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if (is_mt7611(&dev->mt76)) {
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/* 5GHz only */
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dev->mphy.cap.has_5ghz = true;
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return;
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}
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val = FIELD_GET(MT_EE_NIC_WIFI_CONF_BAND_SEL,
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eeprom[MT_EE_WIFI_CONF]);
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switch (val) {
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case MT_EE_5GHZ:
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dev->mphy.cap.has_5ghz = true;
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break;
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case MT_EE_DBDC:
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dev->dbdc_support = true;
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fallthrough;
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case MT_EE_2GHZ:
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dev->mphy.cap.has_2ghz = true;
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break;
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default:
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dev->mphy.cap.has_2ghz = true;
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dev->mphy.cap.has_5ghz = true;
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break;
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}
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}
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static void mt7615_eeprom_parse_hw_cap(struct mt7615_dev *dev)
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{
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u8 *eeprom = dev->mt76.eeprom.data;
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u8 tx_mask, max_nss;
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mt7615_eeprom_parse_hw_band_cap(dev);
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if (is_mt7663(&dev->mt76)) {
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max_nss = 2;
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tx_mask = FIELD_GET(MT_EE_HW_CONF1_TX_MASK,
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eeprom[MT7663_EE_HW_CONF1]);
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} else {
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u32 val;
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/* read tx-rx mask from eeprom */
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val = mt76_rr(dev, MT_TOP_STRAP_STA);
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max_nss = val & MT_TOP_3NSS ? 3 : 4;
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tx_mask = FIELD_GET(MT_EE_NIC_CONF_TX_MASK,
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eeprom[MT_EE_NIC_CONF_0]);
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}
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if (!tx_mask || tx_mask > max_nss)
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tx_mask = max_nss;
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dev->chainmask = BIT(tx_mask) - 1;
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dev->mphy.antenna_mask = dev->chainmask;
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dev->mphy.chainmask = dev->chainmask;
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}
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static int mt7663_eeprom_get_target_power_index(struct mt7615_dev *dev,
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struct ieee80211_channel *chan,
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u8 chain_idx)
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{
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int index, group;
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if (chain_idx > 1)
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return -EINVAL;
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if (chan->band == NL80211_BAND_2GHZ)
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return MT7663_EE_TX0_2G_TARGET_POWER + (chain_idx << 4);
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group = mt7615_get_channel_group(chan->hw_value);
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if (chain_idx == 1)
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index = MT7663_EE_TX1_5G_G0_TARGET_POWER;
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else
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index = MT7663_EE_TX0_5G_G0_TARGET_POWER;
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return index + group * 3;
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}
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int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
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struct ieee80211_channel *chan,
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u8 chain_idx)
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{
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int index;
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if (is_mt7663(&dev->mt76))
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return mt7663_eeprom_get_target_power_index(dev, chan,
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chain_idx);
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if (chain_idx > 3)
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return -EINVAL;
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/* TSSI disabled */
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if (mt7615_ext_pa_enabled(dev, chan->band)) {
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if (chan->band == NL80211_BAND_2GHZ)
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return MT_EE_EXT_PA_2G_TARGET_POWER;
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else
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return MT_EE_EXT_PA_5G_TARGET_POWER;
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}
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/* TSSI enabled */
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if (chan->band == NL80211_BAND_2GHZ) {
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index = MT_EE_TX0_2G_TARGET_POWER + chain_idx * 6;
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} else {
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int group = mt7615_get_channel_group(chan->hw_value);
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switch (chain_idx) {
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case 1:
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index = MT_EE_TX1_5G_G0_TARGET_POWER;
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break;
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case 2:
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index = MT_EE_TX2_5G_G0_TARGET_POWER;
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break;
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case 3:
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index = MT_EE_TX3_5G_G0_TARGET_POWER;
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break;
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case 0:
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default:
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index = MT_EE_TX0_5G_G0_TARGET_POWER;
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break;
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}
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index += 5 * group;
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}
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return index;
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}
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int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
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enum nl80211_band band)
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{
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/* assume the first rate has the highest power offset */
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if (is_mt7663(&dev->mt76)) {
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if (band == NL80211_BAND_2GHZ)
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return MT_EE_TX0_5G_G0_TARGET_POWER;
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else
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return MT7663_EE_5G_RATE_POWER;
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}
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if (band == NL80211_BAND_2GHZ)
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return MT_EE_2G_RATE_POWER;
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else
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return MT_EE_5G_RATE_POWER;
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}
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static void mt7615_apply_cal_free_data(struct mt7615_dev *dev)
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{
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static const u16 ical[] = {
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0x53, 0x54, 0x55, 0x56, 0x57, 0x5c, 0x5d, 0x62, 0x63, 0x68,
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0x69, 0x6e, 0x6f, 0x73, 0x74, 0x78, 0x79, 0x82, 0x83, 0x87,
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0x88, 0x8c, 0x8d, 0x91, 0x92, 0x96, 0x97, 0x9b, 0x9c, 0xa0,
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0xa1, 0xaa, 0xab, 0xaf, 0xb0, 0xb4, 0xb5, 0xb9, 0xba, 0xf4,
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0xf7, 0xff,
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0x140, 0x141, 0x145, 0x146, 0x14a, 0x14b, 0x154, 0x155, 0x159,
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0x15a, 0x15e, 0x15f, 0x163, 0x164, 0x168, 0x169, 0x16d, 0x16e,
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0x172, 0x173, 0x17c, 0x17d, 0x181, 0x182, 0x186, 0x187, 0x18b,
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0x18c
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};
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static const u16 ical_nocheck[] = {
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0x110, 0x111, 0x112, 0x113, 0x114, 0x115, 0x116, 0x117, 0x118,
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0x1b5, 0x1b6, 0x1b7, 0x3ac, 0x3ad, 0x3ae, 0x3af, 0x3b0, 0x3b1,
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0x3b2
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};
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u8 *eeprom = dev->mt76.eeprom.data;
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u8 *otp = dev->mt76.otp.data;
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int i;
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if (!otp)
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return;
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for (i = 0; i < ARRAY_SIZE(ical); i++)
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if (!otp[ical[i]])
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return;
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for (i = 0; i < ARRAY_SIZE(ical); i++)
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eeprom[ical[i]] = otp[ical[i]];
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for (i = 0; i < ARRAY_SIZE(ical_nocheck); i++)
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eeprom[ical_nocheck[i]] = otp[ical_nocheck[i]];
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}
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static void mt7622_apply_cal_free_data(struct mt7615_dev *dev)
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{
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static const u16 ical[] = {
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0x53, 0x54, 0x55, 0x56, 0xf4, 0xf7, 0x144, 0x156, 0x15b
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};
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u8 *eeprom = dev->mt76.eeprom.data;
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u8 *otp = dev->mt76.otp.data;
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int i;
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if (!otp)
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return;
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for (i = 0; i < ARRAY_SIZE(ical); i++) {
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if (!otp[ical[i]])
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continue;
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eeprom[ical[i]] = otp[ical[i]];
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}
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}
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static void mt7615_cal_free_data(struct mt7615_dev *dev)
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{
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struct device_node *np = dev->mt76.dev->of_node;
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if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp"))
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return;
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switch (mt76_chip(&dev->mt76)) {
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case 0x7622:
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mt7622_apply_cal_free_data(dev);
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break;
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case 0x7615:
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case 0x7611:
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mt7615_apply_cal_free_data(dev);
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break;
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}
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}
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int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr)
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{
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int ret;
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ret = mt7615_eeprom_load(dev, addr);
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if (ret < 0)
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return ret;
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ret = mt7615_check_eeprom(&dev->mt76);
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if (ret && dev->mt76.otp.data) {
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memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data,
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MT7615_EEPROM_SIZE);
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} else {
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dev->flash_eeprom = true;
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mt7615_cal_free_data(dev);
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}
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mt7615_eeprom_parse_hw_cap(dev);
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memcpy(dev->mphy.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
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ETH_ALEN);
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mt76_eeprom_override(&dev->mphy);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mt7615_eeprom_init);
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