257 lines
7.7 KiB
C
257 lines
7.7 KiB
C
/*
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* Copyright 2008-2015 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* FM MAC ... */
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#ifndef __FM_MAC_H
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#define __FM_MAC_H
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#include "fman.h"
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#include <linux/slab.h>
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#include <linux/phy.h>
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#include <linux/if_ether.h>
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struct fman_mac;
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struct mac_device;
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/* Ethernet Address */
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typedef u8 enet_addr_t[ETH_ALEN];
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#define ENET_ADDR_TO_UINT64(_enet_addr) \
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(u64)(((u64)(_enet_addr)[0] << 40) | \
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((u64)(_enet_addr)[1] << 32) | \
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((u64)(_enet_addr)[2] << 24) | \
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((u64)(_enet_addr)[3] << 16) | \
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((u64)(_enet_addr)[4] << 8) | \
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((u64)(_enet_addr)[5]))
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#define MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enet_addr) \
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do { \
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int i; \
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for (i = 0; i < ETH_ALEN; i++) \
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(_enet_addr)[i] = \
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(u8)((_addr64) >> ((5 - i) * 8)); \
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} while (0)
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/* defaults */
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#define DEFAULT_RESET_ON_INIT false
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/* PFC defines */
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#define FSL_FM_PAUSE_TIME_ENABLE 0xf000
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#define FSL_FM_PAUSE_TIME_DISABLE 0
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#define FSL_FM_PAUSE_THRESH_DEFAULT 0
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#define FM_MAC_NO_PFC 0xff
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/* HASH defines */
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#define ETH_HASH_ENTRY_OBJ(ptr) \
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hlist_entry_safe(ptr, struct eth_hash_entry, node)
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/* FM MAC Exceptions */
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enum fman_mac_exceptions {
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FM_MAC_EX_10G_MDIO_SCAN_EVENT = 0
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/* 10GEC MDIO scan event interrupt */
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, FM_MAC_EX_10G_MDIO_CMD_CMPL
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/* 10GEC MDIO command completion interrupt */
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, FM_MAC_EX_10G_REM_FAULT
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/* 10GEC, mEMAC Remote fault interrupt */
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, FM_MAC_EX_10G_LOC_FAULT
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/* 10GEC, mEMAC Local fault interrupt */
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, FM_MAC_EX_10G_TX_ECC_ER
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/* 10GEC, mEMAC Transmit frame ECC error interrupt */
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, FM_MAC_EX_10G_TX_FIFO_UNFL
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/* 10GEC, mEMAC Transmit FIFO underflow interrupt */
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, FM_MAC_EX_10G_TX_FIFO_OVFL
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/* 10GEC, mEMAC Transmit FIFO overflow interrupt */
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, FM_MAC_EX_10G_TX_ER
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/* 10GEC Transmit frame error interrupt */
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, FM_MAC_EX_10G_RX_FIFO_OVFL
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/* 10GEC, mEMAC Receive FIFO overflow interrupt */
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, FM_MAC_EX_10G_RX_ECC_ER
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/* 10GEC, mEMAC Receive frame ECC error interrupt */
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, FM_MAC_EX_10G_RX_JAB_FRM
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/* 10GEC Receive jabber frame interrupt */
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, FM_MAC_EX_10G_RX_OVRSZ_FRM
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/* 10GEC Receive oversized frame interrupt */
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, FM_MAC_EX_10G_RX_RUNT_FRM
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/* 10GEC Receive runt frame interrupt */
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, FM_MAC_EX_10G_RX_FRAG_FRM
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/* 10GEC Receive fragment frame interrupt */
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, FM_MAC_EX_10G_RX_LEN_ER
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/* 10GEC Receive payload length error interrupt */
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, FM_MAC_EX_10G_RX_CRC_ER
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/* 10GEC Receive CRC error interrupt */
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, FM_MAC_EX_10G_RX_ALIGN_ER
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/* 10GEC Receive alignment error interrupt */
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, FM_MAC_EX_1G_BAB_RX
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/* dTSEC Babbling receive error */
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, FM_MAC_EX_1G_RX_CTL
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/* dTSEC Receive control (pause frame) interrupt */
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, FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET
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/* dTSEC Graceful transmit stop complete */
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, FM_MAC_EX_1G_BAB_TX
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/* dTSEC Babbling transmit error */
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, FM_MAC_EX_1G_TX_CTL
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/* dTSEC Transmit control (pause frame) interrupt */
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, FM_MAC_EX_1G_TX_ERR
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/* dTSEC Transmit error */
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, FM_MAC_EX_1G_LATE_COL
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/* dTSEC Late collision */
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, FM_MAC_EX_1G_COL_RET_LMT
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/* dTSEC Collision retry limit */
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, FM_MAC_EX_1G_TX_FIFO_UNDRN
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/* dTSEC Transmit FIFO underrun */
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, FM_MAC_EX_1G_MAG_PCKT
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/* dTSEC Magic Packet detection */
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, FM_MAC_EX_1G_MII_MNG_RD_COMPLET
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/* dTSEC MII management read completion */
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, FM_MAC_EX_1G_MII_MNG_WR_COMPLET
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/* dTSEC MII management write completion */
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, FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET
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/* dTSEC Graceful receive stop complete */
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, FM_MAC_EX_1G_DATA_ERR
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/* dTSEC Internal data error on transmit */
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, FM_MAC_1G_RX_DATA_ERR
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/* dTSEC Internal data error on receive */
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, FM_MAC_EX_1G_1588_TS_RX_ERR
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/* dTSEC Time-Stamp Receive Error */
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, FM_MAC_EX_1G_RX_MIB_CNT_OVFL
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/* dTSEC MIB counter overflow */
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, FM_MAC_EX_TS_FIFO_ECC_ERR
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/* mEMAC Time-stamp FIFO ECC error interrupt;
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* not supported on T4240/B4860 rev1 chips
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*/
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, FM_MAC_EX_MAGIC_PACKET_INDICATION = FM_MAC_EX_1G_MAG_PCKT
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/* mEMAC Magic Packet Indication Interrupt */
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};
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struct eth_hash_entry {
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u64 addr; /* Ethernet Address */
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struct list_head node;
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};
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typedef void (fman_mac_exception_cb)(struct mac_device *dev_id,
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enum fman_mac_exceptions exceptions);
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/* FMan MAC config input */
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struct fman_mac_params {
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/* MAC ID; numbering of dTSEC and 1G-mEMAC:
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* 0 - FM_MAX_NUM_OF_1G_MACS;
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* numbering of 10G-MAC (TGEC) and 10G-mEMAC:
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* 0 - FM_MAX_NUM_OF_10G_MACS
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*/
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u8 mac_id;
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/* Note that the speed should indicate the maximum rate that
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* this MAC should support rather than the actual speed;
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*/
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u16 max_speed;
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/* A handle to the FM object this port related to */
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void *fm;
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fman_mac_exception_cb *event_cb; /* MDIO Events Callback Routine */
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fman_mac_exception_cb *exception_cb;/* Exception Callback Routine */
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/* SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
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* and phy or backplane; Note: 1000BaseX auto-negotiation relates only
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* to interface between MAC and phy/backplane, SGMII phy can still
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* synchronize with far-end phy at 10Mbps, 100Mbps or 1000Mbps
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*/
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bool basex_if;
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};
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struct eth_hash_t {
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u16 size;
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struct list_head *lsts;
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};
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static inline struct eth_hash_entry
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*dequeue_addr_from_hash_entry(struct list_head *addr_lst)
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{
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struct eth_hash_entry *hash_entry = NULL;
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if (!list_empty(addr_lst)) {
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hash_entry = ETH_HASH_ENTRY_OBJ(addr_lst->next);
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list_del_init(&hash_entry->node);
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}
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return hash_entry;
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}
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static inline void free_hash_table(struct eth_hash_t *hash)
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{
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struct eth_hash_entry *hash_entry;
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int i = 0;
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if (hash) {
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if (hash->lsts) {
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for (i = 0; i < hash->size; i++) {
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hash_entry =
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dequeue_addr_from_hash_entry(&hash->lsts[i]);
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while (hash_entry) {
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kfree(hash_entry);
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hash_entry =
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dequeue_addr_from_hash_entry(&hash->
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lsts[i]);
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}
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}
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kfree(hash->lsts);
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}
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kfree(hash);
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}
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}
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static inline struct eth_hash_t *alloc_hash_table(u16 size)
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{
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u32 i;
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struct eth_hash_t *hash;
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/* Allocate address hash table */
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hash = kmalloc(sizeof(*hash), GFP_KERNEL);
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if (!hash)
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return NULL;
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hash->size = size;
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hash->lsts = kmalloc_array(hash->size, sizeof(struct list_head),
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GFP_KERNEL);
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if (!hash->lsts) {
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kfree(hash);
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return NULL;
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}
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for (i = 0; i < hash->size; i++)
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INIT_LIST_HEAD(&hash->lsts[i]);
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return hash;
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}
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#endif /* __FM_MAC_H */
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