448 lines
11 KiB
C
448 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/pci.h>
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#include <linux/vmalloc.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_gem_atomic_helper.h>
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#include <drm/drm_probe_helper.h>
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#include "mgag200_drv.h"
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static int mgag200_g200_init_pci_options(struct pci_dev *pdev)
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{
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struct device *dev = &pdev->dev;
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bool has_sgram;
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u32 option;
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int err;
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err = pci_read_config_dword(pdev, PCI_MGA_OPTION, &option);
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if (err != PCIBIOS_SUCCESSFUL) {
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dev_err(dev, "pci_read_config_dword(PCI_MGA_OPTION) failed: %d\n", err);
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return pcibios_err_to_errno(err);
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}
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has_sgram = !!(option & PCI_MGA_OPTION_HARDPWMSK);
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if (has_sgram)
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option = 0x4049cd21;
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else
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option = 0x40499121;
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return mgag200_init_pci_options(pdev, option, 0x00008000);
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}
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static void mgag200_g200_init_registers(struct mgag200_g200_device *g200)
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{
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static const u8 dacvalue[] = {
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MGAG200_DAC_DEFAULT(0x00, 0xc9, 0x1f,
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0x04, 0x2d, 0x19)
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};
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struct mga_device *mdev = &g200->base;
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size_t i;
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for (i = 0; i < ARRAY_SIZE(dacvalue); ++i) {
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if ((i <= 0x17) ||
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(i == 0x1b) ||
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(i == 0x1c) ||
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((i >= 0x1f) && (i <= 0x29)) ||
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((i >= 0x30) && (i <= 0x37)))
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continue;
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WREG_DAC(i, dacvalue[i]);
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}
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mgag200_init_registers(mdev);
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}
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/*
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* PIXPLLC
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*/
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static int mgag200_g200_pixpllc_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state)
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{
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static const int post_div_max = 7;
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static const int in_div_min = 1;
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static const int in_div_max = 6;
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static const int feed_div_min = 7;
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static const int feed_div_max = 127;
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struct drm_device *dev = crtc->dev;
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struct mgag200_g200_device *g200 = to_mgag200_g200_device(dev);
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struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);
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struct mgag200_crtc_state *new_mgag200_crtc_state = to_mgag200_crtc_state(new_crtc_state);
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long clock = new_crtc_state->mode.clock;
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struct mgag200_pll_values *pixpllc = &new_mgag200_crtc_state->pixpllc;
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u8 testp, testm, testn;
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u8 n = 0, m = 0, p, s;
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long f_vco;
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long computed;
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long delta, tmp_delta;
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long ref_clk = g200->ref_clk;
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long p_clk_min = g200->pclk_min;
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long p_clk_max = g200->pclk_max;
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if (clock > p_clk_max) {
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drm_err(dev, "Pixel Clock %ld too high\n", clock);
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return -EINVAL;
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}
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if (clock < p_clk_min >> 3)
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clock = p_clk_min >> 3;
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f_vco = clock;
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for (testp = 0;
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testp <= post_div_max && f_vco < p_clk_min;
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testp = (testp << 1) + 1, f_vco <<= 1)
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;
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p = testp + 1;
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delta = clock;
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for (testm = in_div_min; testm <= in_div_max; testm++) {
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for (testn = feed_div_min; testn <= feed_div_max; testn++) {
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computed = ref_clk * (testn + 1) / (testm + 1);
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if (computed < f_vco)
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tmp_delta = f_vco - computed;
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else
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tmp_delta = computed - f_vco;
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if (tmp_delta < delta) {
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delta = tmp_delta;
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m = testm + 1;
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n = testn + 1;
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}
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}
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}
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f_vco = ref_clk * n / m;
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if (f_vco < 100000)
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s = 0;
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else if (f_vco < 140000)
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s = 1;
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else if (f_vco < 180000)
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s = 2;
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else
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s = 3;
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drm_dbg_kms(dev, "clock: %ld vco: %ld m: %d n: %d p: %d s: %d\n",
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clock, f_vco, m, n, p, s);
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pixpllc->m = m;
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pixpllc->n = n;
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pixpllc->p = p;
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pixpllc->s = s;
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return 0;
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}
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static void mgag200_g200_pixpllc_atomic_update(struct drm_crtc *crtc,
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struct drm_atomic_state *old_state)
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{
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struct drm_device *dev = crtc->dev;
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struct mga_device *mdev = to_mga_device(dev);
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struct drm_crtc_state *crtc_state = crtc->state;
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struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state);
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struct mgag200_pll_values *pixpllc = &mgag200_crtc_state->pixpllc;
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unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
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u8 xpixpllcm, xpixpllcn, xpixpllcp;
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pixpllcm = pixpllc->m - 1;
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pixpllcn = pixpllc->n - 1;
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pixpllcp = pixpllc->p - 1;
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pixpllcs = pixpllc->s;
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xpixpllcm = pixpllcm;
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xpixpllcn = pixpllcn;
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xpixpllcp = (pixpllcs << 3) | pixpllcp;
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WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
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WREG_DAC(MGA1064_PIX_PLLC_M, xpixpllcm);
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WREG_DAC(MGA1064_PIX_PLLC_N, xpixpllcn);
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WREG_DAC(MGA1064_PIX_PLLC_P, xpixpllcp);
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}
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/*
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* Mode-setting pipeline
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*/
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static const struct drm_plane_helper_funcs mgag200_g200_primary_plane_helper_funcs = {
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MGAG200_PRIMARY_PLANE_HELPER_FUNCS,
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};
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static const struct drm_plane_funcs mgag200_g200_primary_plane_funcs = {
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MGAG200_PRIMARY_PLANE_FUNCS,
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};
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static const struct drm_crtc_helper_funcs mgag200_g200_crtc_helper_funcs = {
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MGAG200_CRTC_HELPER_FUNCS,
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};
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static const struct drm_crtc_funcs mgag200_g200_crtc_funcs = {
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MGAG200_CRTC_FUNCS,
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};
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static const struct drm_encoder_funcs mgag200_g200_dac_encoder_funcs = {
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MGAG200_DAC_ENCODER_FUNCS,
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};
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static const struct drm_connector_helper_funcs mgag200_g200_vga_connector_helper_funcs = {
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MGAG200_VGA_CONNECTOR_HELPER_FUNCS,
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};
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static const struct drm_connector_funcs mgag200_g200_vga_connector_funcs = {
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MGAG200_VGA_CONNECTOR_FUNCS,
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};
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static int mgag200_g200_pipeline_init(struct mga_device *mdev)
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{
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struct drm_device *dev = &mdev->base;
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struct drm_plane *primary_plane = &mdev->primary_plane;
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struct drm_crtc *crtc = &mdev->crtc;
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struct drm_encoder *encoder = &mdev->encoder;
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struct mga_i2c_chan *i2c = &mdev->i2c;
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struct drm_connector *connector = &mdev->connector;
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int ret;
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ret = drm_universal_plane_init(dev, primary_plane, 0,
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&mgag200_g200_primary_plane_funcs,
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mgag200_primary_plane_formats,
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mgag200_primary_plane_formats_size,
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mgag200_primary_plane_fmtmods,
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DRM_PLANE_TYPE_PRIMARY, NULL);
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if (ret) {
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drm_err(dev, "drm_universal_plane_init() failed: %d\n", ret);
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return ret;
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}
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drm_plane_helper_add(primary_plane, &mgag200_g200_primary_plane_helper_funcs);
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drm_plane_enable_fb_damage_clips(primary_plane);
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ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,
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&mgag200_g200_crtc_funcs, NULL);
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if (ret) {
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drm_err(dev, "drm_crtc_init_with_planes() failed: %d\n", ret);
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return ret;
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}
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drm_crtc_helper_add(crtc, &mgag200_g200_crtc_helper_funcs);
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/* FIXME: legacy gamma tables, but atomic gamma doesn't work without */
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drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);
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drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);
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encoder->possible_crtcs = drm_crtc_mask(crtc);
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ret = drm_encoder_init(dev, encoder, &mgag200_g200_dac_encoder_funcs,
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DRM_MODE_ENCODER_DAC, NULL);
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if (ret) {
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drm_err(dev, "drm_encoder_init() failed: %d\n", ret);
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return ret;
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}
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ret = mgag200_i2c_init(mdev, i2c);
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if (ret) {
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drm_err(dev, "failed to add DDC bus: %d\n", ret);
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return ret;
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}
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ret = drm_connector_init_with_ddc(dev, connector,
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&mgag200_g200_vga_connector_funcs,
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DRM_MODE_CONNECTOR_VGA,
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&i2c->adapter);
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if (ret) {
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drm_err(dev, "drm_connector_init_with_ddc() failed: %d\n", ret);
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return ret;
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}
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drm_connector_helper_add(connector, &mgag200_g200_vga_connector_helper_funcs);
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ret = drm_connector_attach_encoder(connector, encoder);
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if (ret) {
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drm_err(dev, "drm_connector_attach_encoder() failed: %d\n", ret);
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return ret;
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}
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return 0;
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}
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/*
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* DRM Device
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*/
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static const struct mgag200_device_info mgag200_g200_device_info =
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MGAG200_DEVICE_INFO_INIT(2048, 2048, 0, false, 1, 3, false);
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static void mgag200_g200_interpret_bios(struct mgag200_g200_device *g200,
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const unsigned char *bios, size_t size)
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{
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static const char matrox[] = {'M', 'A', 'T', 'R', 'O', 'X'};
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static const unsigned int expected_length[6] = {
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0, 64, 64, 64, 128, 128
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};
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struct mga_device *mdev = &g200->base;
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struct drm_device *dev = &mdev->base;
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const unsigned char *pins;
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unsigned int pins_len, version;
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int offset;
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int tmp;
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/* Test for MATROX string. */
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if (size < 45 + sizeof(matrox))
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return;
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if (memcmp(&bios[45], matrox, sizeof(matrox)) != 0)
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return;
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/* Get the PInS offset. */
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if (size < MGA_BIOS_OFFSET + 2)
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return;
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offset = (bios[MGA_BIOS_OFFSET + 1] << 8) | bios[MGA_BIOS_OFFSET];
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/* Get PInS data structure. */
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if (size < offset + 6)
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return;
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pins = bios + offset;
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if (pins[0] == 0x2e && pins[1] == 0x41) {
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version = pins[5];
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pins_len = pins[2];
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} else {
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version = 1;
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pins_len = pins[0] + (pins[1] << 8);
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}
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if (version < 1 || version > 5) {
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drm_warn(dev, "Unknown BIOS PInS version: %d\n", version);
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return;
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}
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if (pins_len != expected_length[version]) {
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drm_warn(dev, "Unexpected BIOS PInS size: %d expected: %d\n",
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pins_len, expected_length[version]);
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return;
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}
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if (size < offset + pins_len)
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return;
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drm_dbg_kms(dev, "MATROX BIOS PInS version %d size: %d found\n", version, pins_len);
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/* Extract the clock values */
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switch (version) {
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case 1:
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tmp = pins[24] + (pins[25] << 8);
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if (tmp)
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g200->pclk_max = tmp * 10;
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break;
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case 2:
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if (pins[41] != 0xff)
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g200->pclk_max = (pins[41] + 100) * 1000;
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break;
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case 3:
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if (pins[36] != 0xff)
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g200->pclk_max = (pins[36] + 100) * 1000;
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if (pins[52] & 0x20)
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g200->ref_clk = 14318;
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break;
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case 4:
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if (pins[39] != 0xff)
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g200->pclk_max = pins[39] * 4 * 1000;
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if (pins[92] & 0x01)
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g200->ref_clk = 14318;
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break;
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case 5:
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tmp = pins[4] ? 8000 : 6000;
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if (pins[123] != 0xff)
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g200->pclk_min = pins[123] * tmp;
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if (pins[38] != 0xff)
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g200->pclk_max = pins[38] * tmp;
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if (pins[110] & 0x01)
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g200->ref_clk = 14318;
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break;
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default:
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break;
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}
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}
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static void mgag200_g200_init_refclk(struct mgag200_g200_device *g200)
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{
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struct mga_device *mdev = &g200->base;
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struct drm_device *dev = &mdev->base;
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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unsigned char __iomem *rom;
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unsigned char *bios;
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size_t size;
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g200->pclk_min = 50000;
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g200->pclk_max = 230000;
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g200->ref_clk = 27050;
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rom = pci_map_rom(pdev, &size);
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if (!rom)
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return;
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bios = vmalloc(size);
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if (!bios)
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goto out;
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memcpy_fromio(bios, rom, size);
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if (size != 0 && bios[0] == 0x55 && bios[1] == 0xaa)
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mgag200_g200_interpret_bios(g200, bios, size);
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drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n",
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g200->pclk_min, g200->pclk_max, g200->ref_clk);
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vfree(bios);
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out:
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pci_unmap_rom(pdev, rom);
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}
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static const struct mgag200_device_funcs mgag200_g200_device_funcs = {
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.pixpllc_atomic_check = mgag200_g200_pixpllc_atomic_check,
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.pixpllc_atomic_update = mgag200_g200_pixpllc_atomic_update,
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};
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struct mga_device *mgag200_g200_device_create(struct pci_dev *pdev, const struct drm_driver *drv)
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{
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struct mgag200_g200_device *g200;
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struct mga_device *mdev;
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struct drm_device *dev;
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resource_size_t vram_available;
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int ret;
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g200 = devm_drm_dev_alloc(&pdev->dev, drv, struct mgag200_g200_device, base.base);
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if (IS_ERR(g200))
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return ERR_CAST(g200);
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mdev = &g200->base;
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dev = &mdev->base;
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pci_set_drvdata(pdev, dev);
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ret = mgag200_g200_init_pci_options(pdev);
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if (ret)
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return ERR_PTR(ret);
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ret = mgag200_device_preinit(mdev);
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if (ret)
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return ERR_PTR(ret);
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mgag200_g200_init_refclk(g200);
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ret = mgag200_device_init(mdev, &mgag200_g200_device_info,
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&mgag200_g200_device_funcs);
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if (ret)
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return ERR_PTR(ret);
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mgag200_g200_init_registers(g200);
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vram_available = mgag200_device_probe_vram(mdev);
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ret = mgag200_mode_config_init(mdev, vram_available);
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if (ret)
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return ERR_PTR(ret);
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ret = mgag200_g200_pipeline_init(mdev);
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if (ret)
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return ERR_PTR(ret);
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drm_mode_config_reset(dev);
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return mdev;
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}
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