70 lines
1.5 KiB
C
70 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* SDK7786 FPGA SRAM Support.
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*
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* Copyright (C) 2010 Paul Mundt
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/string.h>
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#include <mach/fpga.h>
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#include <asm/sram.h>
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#include <linux/sizes.h>
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static int __init fpga_sram_init(void)
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{
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unsigned long phys;
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unsigned int area;
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void __iomem *vaddr;
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int ret;
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u16 data;
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/* Enable FPGA SRAM */
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data = fpga_read_reg(LCLASR);
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data |= LCLASR_FRAMEN;
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fpga_write_reg(data, LCLASR);
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/*
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* FPGA_SEL determines the area mapping
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*/
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area = (data & LCLASR_FPGA_SEL_MASK) >> LCLASR_FPGA_SEL_SHIFT;
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if (unlikely(area == LCLASR_AREA_MASK)) {
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pr_err("FPGA memory unmapped.\n");
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return -ENXIO;
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}
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/*
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* The memory itself occupies a 2KiB range at the top of the area
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* immediately below the system registers.
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*/
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phys = (area << 26) + SZ_64M - SZ_4K;
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/*
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* The FPGA SRAM resides in translatable physical space, so set
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* up a mapping prior to inserting it in to the pool.
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*/
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vaddr = ioremap(phys, SZ_2K);
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if (unlikely(!vaddr)) {
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pr_err("Failed remapping FPGA memory.\n");
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return -ENXIO;
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}
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pr_info("Adding %dKiB of FPGA memory at 0x%08lx-0x%08lx "
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"(area %d) to pool.\n",
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SZ_2K >> 10, phys, phys + SZ_2K - 1, area);
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ret = gen_pool_add(sram_pool, (unsigned long)vaddr, SZ_2K, -1);
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if (unlikely(ret < 0)) {
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pr_err("Failed adding memory\n");
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iounmap(vaddr);
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return ret;
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}
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return 0;
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}
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postcore_initcall(fpga_sram_init);
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