203 lines
6.5 KiB
Plaintext
203 lines
6.5 KiB
Plaintext
Qualcomm MSM8998 TLMM block
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This binding describes the Top Level Mode Multiplexer block found in the
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MSM8998 platform.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,msm8998-pinctrl"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: the base address and size of the TLMM register space.
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the TLMM summary IRQ.
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- interrupt-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as an interrupt controller
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- #interrupt-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/interrupt-controller/irq.h>
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- gpio-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as a gpio controller
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- #gpio-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/gpio/gpio.h>
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- gpio-ranges:
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Usage: required
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Definition: see ../gpio/gpio.txt
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- gpio-reserved-ranges:
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Usage: optional
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Definition: see ../gpio/gpio.txt
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Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
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a general description of GPIO and interrupt bindings.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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The pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, drive strength, etc.
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PIN CONFIGURATION NODES:
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function.
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pin configuration subnode:
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- pins:
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Usage: required
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Value type: <string-array>
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Definition: List of gpio pins affected by the properties specified in
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this subnode.
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Valid pins are:
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gpio0-gpio149
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Supports mux, bias and drive-strength
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sdc2_clk, sdc2_cmd, sdc2_data
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Supports bias and drive-strength
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ufs_reset
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Supports bias and drive-strength
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- function:
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Usage: required
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Value type: <string>
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Definition: Specify the alternative function to be configured for the
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specified pins. Functions are only valid for gpio pins.
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Valid values are:
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gpio, adsp_ext, agera_pll, atest_char, atest_gpsadc0,
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atest_gpsadc1, atest_tsens, atest_tsens2, atest_usb1,
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atest_usb10, atest_usb11, atest_usb12, atest_usb13,
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audio_ref, bimc_dte0, bimc_dte1, blsp10_spi, blsp10_spi_a,
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blsp10_spi_b, blsp11_i2c, blsp1_spi, blsp1_spi_a,
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blsp1_spi_b, blsp2_spi, blsp9_spi, blsp_i2c1, blsp_i2c2,
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blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7,
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blsp_i2c8, blsp_i2c9, blsp_i2c10, blsp_i2c11, blsp_i2c12,
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blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, blsp_spi5,
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blsp_spi6, blsp_spi7, blsp_spi8, blsp_spi9, blsp_spi10,
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blsp_spi11, blsp_spi12, blsp_uart1_a, blsp_uart1_b,
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blsp_uart2_a, blsp_uart2_b, blsp_uart3_a, blsp_uart3_b,
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blsp_uart7_a, blsp_uart7_b, blsp_uart8, blsp_uart8_a,
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blsp_uart8_b, blsp_uart9_a, blsp_uart9_b, blsp_uim1_a,
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blsp_uim1_b, blsp_uim2_a, blsp_uim2_b, blsp_uim3_a,
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blsp_uim3_b, blsp_uim7_a, blsp_uim7_b, blsp_uim8_a,
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blsp_uim8_b, blsp_uim9_a, blsp_uim9_b, bt_reset,
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btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,
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cci_timer1, cci_timer2, cci_timer3, cci_timer4, cri_trng,
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cri_trng0, cri_trng1, dbg_out, ddr_bist, edp_hot, edp_lcd,
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gcc_gp1_a, gcc_gp1_b, gcc_gp2_a, gcc_gp2_b, gcc_gp3_a,
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gcc_gp3_b, hdmi_cec, hdmi_ddc, hdmi_hot, hdmi_rcv,
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isense_dbg, jitter_bist, ldo_en, ldo_update, lpass_slimbus,
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m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,
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mdp_vsync3, mdp_vsync_a, mdp_vsync_b, modem_tsync, mss_lte,
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nav_dr, nav_pps, pa_indicator, pci_e0, phase_flag,
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pll_bypassnl, pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc,
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pwr_crypto, pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b,
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qdss_cti1_a, qdss_cti1_b, qdss, qlink_enable,
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qlink_request, qua_mi2s, sd_card, sd_write, sdc40, sdc41,
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sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu,
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spkr_i2s, ssbi1, ssc_irq, ter_mi2s, tgu_ch0, tgu_ch1,
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tsense_pwm1, tsense_pwm2, tsif0, tsif1,
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uim1_clk, uim1_data, uim1_present,
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uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset,
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uim_batt, usb_phy, vfr_1, vsense_clkout, vsense_data0,
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vsense_data1, vsense_mode, wlan1_adc0, wlan1_adc1,
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wlan2_adc0, wlan2_adc1,
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- bias-disable:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as no pull.
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- bias-pull-down:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as pull down.
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- bias-pull-up:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as pull up.
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- output-high:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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high.
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Not valid for sdc pins.
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- output-low:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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low.
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Not valid for sdc pins.
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- drive-strength:
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Usage: optional
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Value type: <u32>
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Definition: Selects the drive strength for the specified pins, in mA.
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Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
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Example:
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tlmm: pinctrl@03400000 {
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compatible = "qcom,msm8998-pinctrl";
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reg = <0x03400000 0xc00000>;
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interrupts = <0 208 0>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&tlmm 0 0 175>;
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gpio-reserved-ranges = <0 4>, <81 4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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uart_console_active: uart_console_active {
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mux {
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pins = "gpio4", "gpio5";
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function = "blsp_uart8_a";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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