69 lines
1.4 KiB
C
69 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Marvell RVU Admin Function driver
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*
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* Copyright (C) 2018 Marvell.
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*
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include "rvu_struct.h"
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#include "common.h"
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#include "mbox.h"
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#include "rvu.h"
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struct reg_range {
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u64 start;
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u64 end;
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};
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struct hw_reg_map {
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u8 regblk;
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u8 num_ranges;
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u64 mask;
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#define MAX_REG_RANGES 8
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struct reg_range range[MAX_REG_RANGES];
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};
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static struct hw_reg_map txsch_reg_map[NIX_TXSCH_LVL_CNT] = {
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{NIX_TXSCH_LVL_SMQ, 2, 0xFFFF, {{0x0700, 0x0708}, {0x1400, 0x14C8} } },
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{NIX_TXSCH_LVL_TL4, 3, 0xFFFF, {{0x0B00, 0x0B08}, {0x0B10, 0x0B18},
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{0x1200, 0x12E0} } },
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{NIX_TXSCH_LVL_TL3, 4, 0xFFFF, {{0x1000, 0x10E0}, {0x1600, 0x1608},
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{0x1610, 0x1618}, {0x1700, 0x17B0} } },
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{NIX_TXSCH_LVL_TL2, 2, 0xFFFF, {{0x0E00, 0x0EE0}, {0x1700, 0x17B0} } },
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{NIX_TXSCH_LVL_TL1, 1, 0xFFFF, {{0x0C00, 0x0D98} } },
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};
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bool rvu_check_valid_reg(int regmap, int regblk, u64 reg)
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{
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int idx;
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struct hw_reg_map *map;
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/* Only 64bit offsets */
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if (reg & 0x07)
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return false;
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if (regmap == TXSCHQ_HWREGMAP) {
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if (regblk >= NIX_TXSCH_LVL_CNT)
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return false;
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map = &txsch_reg_map[regblk];
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} else {
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return false;
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}
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/* Should never happen */
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if (map->regblk != regblk)
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return false;
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reg &= map->mask;
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for (idx = 0; idx < map->num_ranges; idx++) {
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if (reg >= map->range[idx].start &&
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reg < map->range[idx].end)
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return true;
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}
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return false;
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}
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