555 lines
14 KiB
C
555 lines
14 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/* Copyright 2017-2019 NXP */
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#include <linux/timer.h>
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#include <linux/pci.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/dma-mapping.h>
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#include <linux/skbuff.h>
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#include <linux/ethtool.h>
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#include <linux/if_vlan.h>
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#include <linux/phylink.h>
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#include <linux/dim.h>
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#include "enetc_hw.h"
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#define ENETC_MAC_MAXFRM_SIZE 9600
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#define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
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(ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
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#define ENETC_CBD_DATA_MEM_ALIGN 64
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struct enetc_tx_swbd {
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union {
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struct sk_buff *skb;
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struct xdp_frame *xdp_frame;
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};
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dma_addr_t dma;
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struct page *page; /* valid only if is_xdp_tx */
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u16 page_offset; /* valid only if is_xdp_tx */
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u16 len;
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enum dma_data_direction dir;
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u8 is_dma_page:1;
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u8 check_wb:1;
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u8 do_twostep_tstamp:1;
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u8 is_eof:1;
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u8 is_xdp_tx:1;
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u8 is_xdp_redirect:1;
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u8 qbv_en:1;
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};
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#define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
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#define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */
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#define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
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#define ENETC_RXB_DMA_SIZE \
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(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
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#define ENETC_RXB_DMA_SIZE_XDP \
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(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)
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struct enetc_rx_swbd {
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dma_addr_t dma;
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struct page *page;
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u16 page_offset;
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enum dma_data_direction dir;
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u16 len;
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};
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/* ENETC overhead: optional extension BD + 1 BD gap */
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#define ENETC_TXBDS_NEEDED(val) ((val) + 2)
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/* max # of chained Tx BDs is 15, including head and extension BD */
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#define ENETC_MAX_SKB_FRAGS 13
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#define ENETC_TXBDS_MAX_NEEDED ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1)
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struct enetc_ring_stats {
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unsigned int packets;
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unsigned int bytes;
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unsigned int rx_alloc_errs;
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unsigned int xdp_drops;
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unsigned int xdp_tx;
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unsigned int xdp_tx_drops;
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unsigned int xdp_redirect;
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unsigned int xdp_redirect_failures;
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unsigned int xdp_redirect_sg;
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unsigned int recycles;
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unsigned int recycle_failures;
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unsigned int win_drop;
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};
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struct enetc_xdp_data {
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struct xdp_rxq_info rxq;
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struct bpf_prog *prog;
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int xdp_tx_in_flight;
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};
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#define ENETC_RX_RING_DEFAULT_SIZE 2048
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#define ENETC_TX_RING_DEFAULT_SIZE 2048
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#define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)
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struct enetc_bdr {
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struct device *dev; /* for DMA mapping */
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struct net_device *ndev;
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void *bd_base; /* points to Rx or Tx BD ring */
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union {
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void __iomem *tpir;
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void __iomem *rcir;
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};
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u16 index;
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u16 prio;
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int bd_count; /* # of BDs */
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int next_to_use;
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int next_to_clean;
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union {
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struct enetc_tx_swbd *tx_swbd;
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struct enetc_rx_swbd *rx_swbd;
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};
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union {
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void __iomem *tcir; /* Tx */
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int next_to_alloc; /* Rx */
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};
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void __iomem *idr; /* Interrupt Detect Register pointer */
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int buffer_offset;
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struct enetc_xdp_data xdp;
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struct enetc_ring_stats stats;
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dma_addr_t bd_dma_base;
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u8 tsd_enable; /* Time specific departure */
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bool ext_en; /* enable h/w descriptor extensions */
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/* DMA buffer for TSO headers */
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char *tso_headers;
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dma_addr_t tso_headers_dma;
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} ____cacheline_aligned_in_smp;
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static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
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{
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if (unlikely(++*i == bdr->bd_count))
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*i = 0;
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}
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static inline int enetc_bd_unused(struct enetc_bdr *bdr)
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{
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if (bdr->next_to_clean > bdr->next_to_use)
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return bdr->next_to_clean - bdr->next_to_use - 1;
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return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
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}
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static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
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{
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if (bdr->next_to_clean > bdr->next_to_alloc)
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return bdr->next_to_clean - bdr->next_to_alloc - 1;
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return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
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}
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/* Control BD ring */
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#define ENETC_CBDR_DEFAULT_SIZE 64
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struct enetc_cbdr {
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void *bd_base; /* points to Rx or Tx BD ring */
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void __iomem *pir;
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void __iomem *cir;
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void __iomem *mr; /* mode register */
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int bd_count; /* # of BDs */
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int next_to_use;
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int next_to_clean;
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dma_addr_t bd_dma_base;
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struct device *dma_dev;
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};
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#define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
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static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
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{
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int hw_idx = i;
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#ifdef CONFIG_FSL_ENETC_PTP_CLOCK
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if (rx_ring->ext_en)
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hw_idx = 2 * i;
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#endif
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return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
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}
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static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
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union enetc_rx_bd **old_rxbd, int *old_index)
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{
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union enetc_rx_bd *new_rxbd = *old_rxbd;
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int new_index = *old_index;
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new_rxbd++;
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#ifdef CONFIG_FSL_ENETC_PTP_CLOCK
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if (rx_ring->ext_en)
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new_rxbd++;
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#endif
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if (unlikely(++new_index == rx_ring->bd_count)) {
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new_rxbd = rx_ring->bd_base;
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new_index = 0;
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}
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*old_rxbd = new_rxbd;
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*old_index = new_index;
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}
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static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
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{
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return ++rxbd;
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}
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struct enetc_msg_swbd {
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void *vaddr;
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dma_addr_t dma;
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int size;
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};
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#define ENETC_REV1 0x1
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enum enetc_errata {
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ENETC_ERR_VLAN_ISOL = BIT(0),
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ENETC_ERR_UCMCSWP = BIT(1),
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};
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#define ENETC_SI_F_QBV BIT(0)
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#define ENETC_SI_F_PSFP BIT(1)
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/* PCI IEP device data */
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struct enetc_si {
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struct pci_dev *pdev;
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struct enetc_hw hw;
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enum enetc_errata errata;
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struct net_device *ndev; /* back ref. */
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struct enetc_cbdr cbd_ring;
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int num_rx_rings; /* how many rings are available in the SI */
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int num_tx_rings;
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int num_fs_entries;
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int num_rss; /* number of RSS buckets */
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unsigned short pad;
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int hw_features;
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};
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#define ENETC_SI_ALIGN 32
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static inline void *enetc_si_priv(const struct enetc_si *si)
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{
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return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
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}
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static inline bool enetc_si_is_pf(struct enetc_si *si)
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{
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return !!(si->hw.port);
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}
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static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
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{
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switch (pf_pdev->devfn) {
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case 0:
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return 0;
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case 1:
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return 1;
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case 2:
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return 2;
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case 6:
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return 3;
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default:
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return -1;
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}
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}
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#define ENETC_MAX_NUM_TXQS 8
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#define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
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struct enetc_int_vector {
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void __iomem *rbier;
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void __iomem *tbier_base;
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void __iomem *ricr1;
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unsigned long tx_rings_map;
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int count_tx_rings;
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u32 rx_ictt;
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u16 comp_cnt;
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bool rx_dim_en, rx_napi_work;
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struct napi_struct napi ____cacheline_aligned_in_smp;
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struct dim rx_dim ____cacheline_aligned_in_smp;
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char name[ENETC_INT_NAME_MAX];
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struct enetc_bdr rx_ring;
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struct enetc_bdr tx_ring[];
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} ____cacheline_aligned_in_smp;
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struct enetc_cls_rule {
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struct ethtool_rx_flow_spec fs;
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int used;
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};
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#define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */
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struct psfp_cap {
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u32 max_streamid;
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u32 max_psfp_filter;
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u32 max_psfp_gate;
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u32 max_psfp_gatelist;
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u32 max_psfp_meter;
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};
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#define ENETC_F_TX_TSTAMP_MASK 0xff
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/* TODO: more hardware offloads */
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enum enetc_active_offloads {
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/* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
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ENETC_F_TX_TSTAMP = BIT(0),
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ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1),
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ENETC_F_RX_TSTAMP = BIT(8),
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ENETC_F_QBV = BIT(9),
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ENETC_F_QCI = BIT(10),
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};
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enum enetc_flags_bit {
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ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
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};
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/* interrupt coalescing modes */
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enum enetc_ic_mode {
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/* one interrupt per frame */
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ENETC_IC_NONE = 0,
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/* activated when int coalescing time is set to a non-0 value */
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ENETC_IC_RX_MANUAL = BIT(0),
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ENETC_IC_TX_MANUAL = BIT(1),
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/* use dynamic interrupt moderation */
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ENETC_IC_RX_ADAPTIVE = BIT(2),
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};
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#define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
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#define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
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#define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600)
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struct enetc_ndev_priv {
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struct net_device *ndev;
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struct device *dev; /* dma-mapping device */
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struct enetc_si *si;
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int bdr_int_num; /* number of Rx/Tx ring interrupts */
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struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
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u16 num_rx_rings, num_tx_rings;
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u16 rx_bd_count, tx_bd_count;
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u16 msg_enable;
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enum enetc_active_offloads active_offloads;
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u32 speed; /* store speed for compare update pspeed */
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struct enetc_bdr **xdp_tx_ring;
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struct enetc_bdr *tx_ring[16];
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struct enetc_bdr *rx_ring[16];
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struct enetc_cls_rule *cls_rules;
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struct psfp_cap psfp_cap;
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struct phylink *phylink;
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int ic_mode;
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u32 tx_ictt;
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struct bpf_prog *xdp_prog;
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unsigned long flags;
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struct work_struct tx_onestep_tstamp;
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struct sk_buff_head tx_skbs;
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};
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/* Messaging */
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/* VF-PF set primary MAC address message format */
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struct enetc_msg_cmd_set_primary_mac {
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struct enetc_msg_cmd_header header;
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struct sockaddr mac;
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};
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#define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
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#define ENETC_CBDR_TIMEOUT 1000 /* usecs */
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/* PTP driver exports */
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extern int enetc_phc_index;
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/* SI common */
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int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
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void enetc_pci_remove(struct pci_dev *pdev);
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int enetc_alloc_msix(struct enetc_ndev_priv *priv);
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void enetc_free_msix(struct enetc_ndev_priv *priv);
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void enetc_get_si_caps(struct enetc_si *si);
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void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
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int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
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void enetc_free_si_resources(struct enetc_ndev_priv *priv);
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int enetc_configure_si(struct enetc_ndev_priv *priv);
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int enetc_open(struct net_device *ndev);
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int enetc_close(struct net_device *ndev);
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void enetc_start(struct net_device *ndev);
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void enetc_stop(struct net_device *ndev);
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netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
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struct net_device_stats *enetc_get_stats(struct net_device *ndev);
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void enetc_set_features(struct net_device *ndev, netdev_features_t features);
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int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
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int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
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int enetc_setup_bpf(struct net_device *dev, struct netdev_bpf *xdp);
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int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
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struct xdp_frame **frames, u32 flags);
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/* ethtool */
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void enetc_set_ethtool_ops(struct net_device *ndev);
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/* control buffer descriptor ring (CBDR) */
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int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,
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struct enetc_cbdr *cbdr);
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void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);
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int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
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char *mac_addr, int si_map);
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int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
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int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
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int index);
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void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);
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int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
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int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
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int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
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static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,
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struct enetc_cbd *cbd,
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int size, dma_addr_t *dma,
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void **data_align)
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{
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struct enetc_cbdr *ring = &si->cbd_ring;
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dma_addr_t dma_align;
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void *data;
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data = dma_alloc_coherent(ring->dma_dev,
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size + ENETC_CBD_DATA_MEM_ALIGN,
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dma, GFP_KERNEL);
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if (!data) {
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dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");
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return NULL;
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}
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dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);
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*data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);
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cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));
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cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));
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cbd->length = cpu_to_le16(size);
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return data;
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}
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static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,
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void *data, dma_addr_t *dma)
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{
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struct enetc_cbdr *ring = &si->cbd_ring;
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dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,
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data, *dma);
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}
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void enetc_reset_ptcmsdur(struct enetc_hw *hw);
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void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
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#ifdef CONFIG_FSL_ENETC_QOS
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int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
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int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
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void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
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int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
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int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
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int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
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void *cb_priv);
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int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
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int enetc_psfp_init(struct enetc_ndev_priv *priv);
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int enetc_psfp_clean(struct enetc_ndev_priv *priv);
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int enetc_set_psfp(struct net_device *ndev, bool en);
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static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
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{
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struct enetc_hw *hw = &priv->si->hw;
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u32 reg;
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reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
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priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
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/* Port stream filter capability */
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reg = enetc_port_rd(hw, ENETC_PSFCAPR);
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priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
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/* Port stream gate capability */
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reg = enetc_port_rd(hw, ENETC_PSGCAPR);
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priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
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priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
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/* Port flow meter capability */
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reg = enetc_port_rd(hw, ENETC_PFMCAPR);
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priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
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}
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static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
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{
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struct enetc_hw *hw = &priv->si->hw;
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int err;
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enetc_get_max_cap(priv);
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err = enetc_psfp_init(priv);
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if (err)
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return err;
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enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
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ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
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ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
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return 0;
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}
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static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
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{
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struct enetc_hw *hw = &priv->si->hw;
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int err;
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err = enetc_psfp_clean(priv);
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if (err)
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return err;
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enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
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~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
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~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
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memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
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return 0;
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}
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#else
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#define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP
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#define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
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#define enetc_sched_speed_set(priv, speed) (void)0
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#define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
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#define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
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#define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
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#define enetc_setup_tc_block_cb NULL
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#define enetc_get_max_cap(p) \
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memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
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|
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static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
|
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{
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return 0;
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}
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|
|
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static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
|
|
{
|
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return 0;
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}
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|
|
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static inline int enetc_set_psfp(struct net_device *ndev, bool en)
|
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{
|
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return 0;
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|
}
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#endif
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