277 lines
6.4 KiB
C
277 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// mcp251xfd - Microchip MCP251xFD Family CAN controller driver
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//
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// Copyright (c) 2019, 2020, 2021 Pengutronix,
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// Marc Kleine-Budde <kernel@pengutronix.de>
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//
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// Based on:
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//
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// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface
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//
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// Copyright (c) 2019 Martin Sperl <kernel@martin.sperl.org>
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//
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#include <linux/bitfield.h>
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#include "mcp251xfd.h"
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static inline int
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mcp251xfd_rx_head_get_from_chip(const struct mcp251xfd_priv *priv,
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const struct mcp251xfd_rx_ring *ring,
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u8 *rx_head, bool *fifo_empty)
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{
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u32 fifo_sta;
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int err;
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err = regmap_read(priv->map_reg, MCP251XFD_REG_FIFOSTA(ring->fifo_nr),
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&fifo_sta);
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if (err)
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return err;
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*rx_head = FIELD_GET(MCP251XFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);
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*fifo_empty = !(fifo_sta & MCP251XFD_REG_FIFOSTA_TFNRFNIF);
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return 0;
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}
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static inline int
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mcp251xfd_rx_tail_get_from_chip(const struct mcp251xfd_priv *priv,
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const struct mcp251xfd_rx_ring *ring,
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u8 *rx_tail)
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{
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u32 fifo_ua;
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int err;
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err = regmap_read(priv->map_reg, MCP251XFD_REG_FIFOUA(ring->fifo_nr),
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&fifo_ua);
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if (err)
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return err;
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fifo_ua -= ring->base - MCP251XFD_RAM_START;
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*rx_tail = fifo_ua / ring->obj_size;
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return 0;
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}
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static int
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mcp251xfd_check_rx_tail(const struct mcp251xfd_priv *priv,
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const struct mcp251xfd_rx_ring *ring)
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{
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u8 rx_tail_chip, rx_tail;
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int err;
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if (!IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY))
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return 0;
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err = mcp251xfd_rx_tail_get_from_chip(priv, ring, &rx_tail_chip);
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if (err)
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return err;
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rx_tail = mcp251xfd_get_rx_tail(ring);
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if (rx_tail_chip != rx_tail) {
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netdev_err(priv->ndev,
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"RX tail of chip (%d) and ours (%d) inconsistent.\n",
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rx_tail_chip, rx_tail);
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return -EILSEQ;
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}
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return 0;
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}
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static int
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mcp251xfd_rx_ring_update(const struct mcp251xfd_priv *priv,
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struct mcp251xfd_rx_ring *ring)
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{
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u32 new_head;
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u8 chip_rx_head;
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bool fifo_empty;
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int err;
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err = mcp251xfd_rx_head_get_from_chip(priv, ring, &chip_rx_head,
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&fifo_empty);
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if (err || fifo_empty)
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return err;
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/* chip_rx_head, is the next RX-Object filled by the HW.
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* The new RX head must be >= the old head.
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*/
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new_head = round_down(ring->head, ring->obj_num) + chip_rx_head;
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if (new_head <= ring->head)
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new_head += ring->obj_num;
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ring->head = new_head;
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return mcp251xfd_check_rx_tail(priv, ring);
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}
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static void
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mcp251xfd_hw_rx_obj_to_skb(const struct mcp251xfd_priv *priv,
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const struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj,
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struct sk_buff *skb)
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{
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struct canfd_frame *cfd = (struct canfd_frame *)skb->data;
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u8 dlc;
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if (hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_IDE) {
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u32 sid, eid;
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eid = FIELD_GET(MCP251XFD_OBJ_ID_EID_MASK, hw_rx_obj->id);
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sid = FIELD_GET(MCP251XFD_OBJ_ID_SID_MASK, hw_rx_obj->id);
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cfd->can_id = CAN_EFF_FLAG |
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FIELD_PREP(MCP251XFD_REG_FRAME_EFF_EID_MASK, eid) |
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FIELD_PREP(MCP251XFD_REG_FRAME_EFF_SID_MASK, sid);
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} else {
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cfd->can_id = FIELD_GET(MCP251XFD_OBJ_ID_SID_MASK,
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hw_rx_obj->id);
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}
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dlc = FIELD_GET(MCP251XFD_OBJ_FLAGS_DLC_MASK, hw_rx_obj->flags);
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/* CANFD */
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if (hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_FDF) {
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if (hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_ESI)
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cfd->flags |= CANFD_ESI;
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if (hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_BRS)
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cfd->flags |= CANFD_BRS;
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cfd->len = can_fd_dlc2len(dlc);
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} else {
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if (hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_RTR)
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cfd->can_id |= CAN_RTR_FLAG;
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can_frame_set_cc_len((struct can_frame *)cfd, dlc,
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priv->can.ctrlmode);
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}
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if (!(hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_RTR))
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memcpy(cfd->data, hw_rx_obj->data, cfd->len);
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mcp251xfd_skb_set_timestamp(priv, skb, hw_rx_obj->ts);
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}
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static int
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mcp251xfd_handle_rxif_one(struct mcp251xfd_priv *priv,
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struct mcp251xfd_rx_ring *ring,
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const struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj)
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{
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struct net_device_stats *stats = &priv->ndev->stats;
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struct sk_buff *skb;
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struct canfd_frame *cfd;
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int err;
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if (hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_FDF)
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skb = alloc_canfd_skb(priv->ndev, &cfd);
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else
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skb = alloc_can_skb(priv->ndev, (struct can_frame **)&cfd);
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if (!skb) {
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stats->rx_dropped++;
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return 0;
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}
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mcp251xfd_hw_rx_obj_to_skb(priv, hw_rx_obj, skb);
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err = can_rx_offload_queue_timestamp(&priv->offload, skb, hw_rx_obj->ts);
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if (err)
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stats->rx_fifo_errors++;
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return 0;
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}
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static inline int
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mcp251xfd_rx_obj_read(const struct mcp251xfd_priv *priv,
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const struct mcp251xfd_rx_ring *ring,
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struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj,
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const u8 offset, const u8 len)
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{
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const int val_bytes = regmap_get_val_bytes(priv->map_rx);
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int err;
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err = regmap_bulk_read(priv->map_rx,
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mcp251xfd_get_rx_obj_addr(ring, offset),
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hw_rx_obj,
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len * ring->obj_size / val_bytes);
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return err;
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}
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static int
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mcp251xfd_handle_rxif_ring(struct mcp251xfd_priv *priv,
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struct mcp251xfd_rx_ring *ring)
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{
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struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj = ring->obj;
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u8 rx_tail, len;
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int err, i;
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err = mcp251xfd_rx_ring_update(priv, ring);
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if (err)
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return err;
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while ((len = mcp251xfd_get_rx_linear_len(ring))) {
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int offset;
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rx_tail = mcp251xfd_get_rx_tail(ring);
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err = mcp251xfd_rx_obj_read(priv, ring, hw_rx_obj,
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rx_tail, len);
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if (err)
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return err;
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for (i = 0; i < len; i++) {
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err = mcp251xfd_handle_rxif_one(priv, ring,
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(void *)hw_rx_obj +
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i * ring->obj_size);
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if (err)
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return err;
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}
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/* Increment the RX FIFO tail pointer 'len' times in a
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* single SPI message.
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*
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* Note:
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* Calculate offset, so that the SPI transfer ends on
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* the last message of the uinc_xfer array, which has
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* "cs_change == 0", to properly deactivate the chip
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* select.
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*/
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offset = ARRAY_SIZE(ring->uinc_xfer) - len;
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err = spi_sync_transfer(priv->spi,
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ring->uinc_xfer + offset, len);
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if (err)
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return err;
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ring->tail += len;
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}
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return 0;
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}
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int mcp251xfd_handle_rxif(struct mcp251xfd_priv *priv)
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{
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struct mcp251xfd_rx_ring *ring;
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int err, n;
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mcp251xfd_for_each_rx_ring(priv, ring, n) {
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/* - if RX IRQ coalescing is active always handle ring 0
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* - only handle rings if RX IRQ is active
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*/
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if ((ring->nr > 0 || !priv->rx_obj_num_coalesce_irq) &&
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!(priv->regs_status.rxif & BIT(ring->fifo_nr)))
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continue;
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err = mcp251xfd_handle_rxif_ring(priv, ring);
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if (err)
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return err;
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}
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if (priv->rx_coalesce_usecs_irq)
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hrtimer_start(&priv->rx_irq_timer,
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ns_to_ktime(priv->rx_coalesce_usecs_irq *
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NSEC_PER_USEC),
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HRTIMER_MODE_REL);
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return 0;
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}
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