239 lines
6.0 KiB
C
239 lines
6.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Jie Qiu <jie.qiu@mediatek.com>
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*/
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#ifndef __MTK_DPI_REGS_H
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#define __MTK_DPI_REGS_H
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#define DPI_EN 0x00
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#define EN BIT(0)
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#define DPI_RET 0x04
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#define RST BIT(0)
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#define DPI_INTEN 0x08
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#define INT_VSYNC_EN BIT(0)
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#define INT_VDE_EN BIT(1)
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#define INT_UNDERFLOW_EN BIT(2)
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#define DPI_INTSTA 0x0C
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#define INT_VSYNC_STA BIT(0)
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#define INT_VDE_STA BIT(1)
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#define INT_UNDERFLOW_STA BIT(2)
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#define DPI_CON 0x10
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#define BG_ENABLE BIT(0)
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#define IN_RB_SWAP BIT(1)
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#define INTL_EN BIT(2)
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#define TDFP_EN BIT(3)
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#define CLPF_EN BIT(4)
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#define YUV422_EN BIT(5)
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#define CSC_ENABLE BIT(6)
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#define R601_SEL BIT(7)
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#define EMBSYNC_EN BIT(8)
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#define VS_LODD_EN BIT(16)
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#define VS_LEVEN_EN BIT(17)
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#define VS_RODD_EN BIT(18)
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#define VS_REVEN BIT(19)
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#define FAKE_DE_LODD BIT(20)
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#define FAKE_DE_LEVEN BIT(21)
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#define FAKE_DE_RODD BIT(22)
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#define FAKE_DE_REVEN BIT(23)
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#define DPINTF_YUV422_EN BIT(24)
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#define DPINTF_CSC_ENABLE BIT(26)
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#define DPINTF_INPUT_2P_EN BIT(29)
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#define DPI_OUTPUT_SETTING 0x14
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#define CH_SWAP 0
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#define DPINTF_CH_SWAP 1
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#define CH_SWAP_MASK (0x7 << 0)
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#define SWAP_RGB 0x00
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#define SWAP_GBR 0x01
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#define SWAP_BRG 0x02
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#define SWAP_RBG 0x03
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#define SWAP_GRB 0x04
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#define SWAP_BGR 0x05
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#define BIT_SWAP BIT(3)
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#define B_MASK BIT(4)
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#define G_MASK BIT(5)
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#define R_MASK BIT(6)
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#define DE_MASK BIT(8)
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#define HS_MASK BIT(9)
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#define VS_MASK BIT(10)
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#define DE_POL BIT(12)
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#define HSYNC_POL BIT(13)
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#define VSYNC_POL BIT(14)
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#define CK_POL BIT(15)
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#define OEN_OFF BIT(16)
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#define EDGE_SEL BIT(17)
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#define OUT_BIT 18
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#define OUT_BIT_MASK (0x3 << 18)
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#define OUT_BIT_8 0x00
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#define OUT_BIT_10 0x01
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#define OUT_BIT_12 0x02
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#define OUT_BIT_16 0x03
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#define YC_MAP 20
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#define YC_MAP_MASK (0x7 << 20)
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#define YC_MAP_RGB 0x00
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#define YC_MAP_CYCY 0x04
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#define YC_MAP_YCYC 0x05
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#define YC_MAP_CY 0x06
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#define YC_MAP_YC 0x07
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#define DPI_SIZE 0x18
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#define HSIZE 0
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#define HSIZE_MASK (0x1FFF << 0)
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#define DPINTF_HSIZE_MASK (0xFFFF << 0)
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#define VSIZE 16
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#define VSIZE_MASK (0x1FFF << 16)
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#define DPINTF_VSIZE_MASK (0xFFFF << 16)
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#define DPI_DDR_SETTING 0x1C
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#define DDR_EN BIT(0)
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#define DDDR_SEL BIT(1)
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#define DDR_4PHASE BIT(2)
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#define DDR_WIDTH (0x3 << 4)
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#define DDR_PAD_MODE (0x1 << 8)
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#define DPI_TGEN_HWIDTH 0x20
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#define HPW 0
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#define HPW_MASK (0xFFF << 0)
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#define DPINTF_HPW_MASK (0xFFFF << 0)
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#define DPI_TGEN_HPORCH 0x24
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#define HBP 0
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#define HBP_MASK (0xFFF << 0)
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#define DPINTF_HBP_MASK (0xFFFF << 0)
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#define HFP 16
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#define HFP_MASK (0xFFF << 16)
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#define DPINTF_HFP_MASK (0xFFFF << 16)
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#define DPI_TGEN_VWIDTH 0x28
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#define DPI_TGEN_VPORCH 0x2C
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#define VSYNC_WIDTH_SHIFT 0
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#define VSYNC_WIDTH_MASK (0xFFF << 0)
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#define DPINTF_VSYNC_WIDTH_MASK (0xFFFF << 0)
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#define VSYNC_HALF_LINE_SHIFT 16
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#define VSYNC_HALF_LINE_MASK BIT(16)
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#define VSYNC_BACK_PORCH_SHIFT 0
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#define VSYNC_BACK_PORCH_MASK (0xFFF << 0)
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#define DPINTF_VSYNC_BACK_PORCH_MASK (0xFFFF << 0)
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#define VSYNC_FRONT_PORCH_SHIFT 16
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#define VSYNC_FRONT_PORCH_MASK (0xFFF << 16)
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#define DPINTF_VSYNC_FRONT_PORCH_MASK (0xFFFF << 16)
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#define DPI_BG_HCNTL 0x30
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#define BG_RIGHT (0x1FFF << 0)
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#define BG_LEFT (0x1FFF << 16)
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#define DPI_BG_VCNTL 0x34
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#define BG_BOT (0x1FFF << 0)
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#define BG_TOP (0x1FFF << 16)
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#define DPI_BG_COLOR 0x38
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#define BG_B (0xF << 0)
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#define BG_G (0xF << 8)
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#define BG_R (0xF << 16)
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#define DPI_FIFO_CTL 0x3C
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#define FIFO_VALID_SET (0x1F << 0)
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#define FIFO_RST_SEL (0x1 << 8)
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#define DPI_STATUS 0x40
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#define VCOUNTER (0x1FFF << 0)
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#define DPI_BUSY BIT(16)
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#define OUTEN BIT(17)
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#define FIELD BIT(20)
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#define TDLR BIT(21)
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#define DPI_TMODE 0x44
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#define DPI_OEN_ON BIT(0)
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#define DPI_CHECKSUM 0x48
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#define DPI_CHECKSUM_MASK (0xFFFFFF << 0)
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#define DPI_CHECKSUM_READY BIT(30)
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#define DPI_CHECKSUM_EN BIT(31)
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#define DPI_DUMMY 0x50
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#define DPI_DUMMY_MASK (0xFFFFFFFF << 0)
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#define DPI_TGEN_VWIDTH_LEVEN 0x68
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#define DPI_TGEN_VPORCH_LEVEN 0x6C
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#define DPI_TGEN_VWIDTH_RODD 0x70
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#define DPI_TGEN_VPORCH_RODD 0x74
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#define DPI_TGEN_VWIDTH_REVEN 0x78
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#define DPI_TGEN_VPORCH_REVEN 0x7C
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#define DPI_ESAV_VTIMING_LODD 0x80
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#define ESAV_VOFST_LODD (0xFFF << 0)
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#define ESAV_VWID_LODD (0xFFF << 16)
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#define DPI_ESAV_VTIMING_LEVEN 0x84
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#define ESAV_VOFST_LEVEN (0xFFF << 0)
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#define ESAV_VWID_LEVEN (0xFFF << 16)
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#define DPI_ESAV_VTIMING_RODD 0x88
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#define ESAV_VOFST_RODD (0xFFF << 0)
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#define ESAV_VWID_RODD (0xFFF << 16)
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#define DPI_ESAV_VTIMING_REVEN 0x8C
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#define ESAV_VOFST_REVEN (0xFFF << 0)
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#define ESAV_VWID_REVEN (0xFFF << 16)
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#define DPI_ESAV_FTIMING 0x90
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#define ESAV_FOFST_ODD (0xFFF << 0)
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#define ESAV_FOFST_EVEN (0xFFF << 16)
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#define DPI_CLPF_SETTING 0x94
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#define CLPF_TYPE (0x3 << 0)
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#define ROUND_EN BIT(4)
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#define DPI_Y_LIMIT 0x98
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#define Y_LIMINT_BOT 0
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#define Y_LIMINT_BOT_MASK (0xFFF << 0)
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#define Y_LIMINT_TOP 16
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#define Y_LIMINT_TOP_MASK (0xFFF << 16)
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#define DPI_C_LIMIT 0x9C
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#define C_LIMIT_BOT 0
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#define C_LIMIT_BOT_MASK (0xFFF << 0)
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#define C_LIMIT_TOP 16
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#define C_LIMIT_TOP_MASK (0xFFF << 16)
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#define DPI_YUV422_SETTING 0xA0
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#define UV_SWAP BIT(0)
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#define CR_DELSEL BIT(4)
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#define CB_DELSEL BIT(5)
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#define Y_DELSEL BIT(6)
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#define DE_DELSEL BIT(7)
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#define DPI_EMBSYNC_SETTING 0xA4
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#define EMBSYNC_R_CR_EN BIT(0)
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#define EMPSYNC_G_Y_EN BIT(1)
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#define EMPSYNC_B_CB_EN BIT(2)
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#define ESAV_F_INV BIT(4)
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#define ESAV_V_INV BIT(5)
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#define ESAV_H_INV BIT(6)
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#define ESAV_CODE_MAN BIT(8)
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#define VS_OUT_SEL (0x7 << 12)
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#define DPI_ESAV_CODE_SET0 0xA8
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#define ESAV_CODE0 (0xFFF << 0)
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#define ESAV_CODE1 (0xFFF << 16)
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#define DPI_ESAV_CODE_SET1 0xAC
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#define ESAV_CODE2 (0xFFF << 0)
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#define ESAV_CODE3_MSB BIT(16)
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#define EDGE_SEL_EN BIT(5)
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#define H_FRE_2N BIT(25)
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#define DPI_MATRIX_SET 0xB4
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#define INT_MATRIX_SEL_MASK GENMASK(4, 0)
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#define MATRIX_SEL_RGB_TO_JPEG 0
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#define MATRIX_SEL_RGB_TO_BT601 2
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#endif /* __MTK_DPI_REGS_H */
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