82 lines
2.0 KiB
C
82 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* arch/sh/kernel/cpu/sh3/clock-sh7705.c
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*
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* SH7705 support for the clock framework
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*
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* Copyright (C) 2005 Paul Mundt
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*
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* FRQCR parsing hacked out of arch/sh/kernel/time.c
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*
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* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
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* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
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* Copyright (C) 2002, 2003, 2004 Paul Mundt
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* Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <asm/clock.h>
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#include <asm/freq.h>
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#include <asm/io.h>
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/*
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* SH7705 uses the same divisors as the generic SH-3 case, it's just the
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* FRQCR layout that is a bit different..
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*/
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static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
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static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
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static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
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static void master_clk_init(struct clk *clk)
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{
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clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
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}
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static struct sh_clk_ops sh7705_master_clk_ops = {
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.init = master_clk_init,
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};
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int idx = __raw_readw(FRQCR) & 0x0003;
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct sh_clk_ops sh7705_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
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return clk->parent->rate / stc_multipliers[idx];
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}
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static struct sh_clk_ops sh7705_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct sh_clk_ops sh7705_cpu_clk_ops = {
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.recalc = cpu_clk_recalc,
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};
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static struct sh_clk_ops *sh7705_clk_ops[] = {
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&sh7705_master_clk_ops,
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&sh7705_module_clk_ops,
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&sh7705_bus_clk_ops,
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&sh7705_cpu_clk_ops,
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};
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void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
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{
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if (idx < ARRAY_SIZE(sh7705_clk_ops))
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*ops = sh7705_clk_ops[idx];
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}
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