69 lines
1.7 KiB
YAML
69 lines
1.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Xilinx AXI/PLB softcore and window Watchdog Timer
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maintainers:
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- Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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- Srinivas Neeli <srinivas.neeli@xilinx.com>
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description:
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The Timebase watchdog timer(WDT) is a free-running 32 bit counter.
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WDT uses a dual-expiration architecture. After one expiration of
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the timeout interval, an interrupt is generated and the WDT state
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bit is set to one in the status register. If the state bit is not
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cleared (by writing a one to the state bit) before the next
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expiration of the timeout interval, a WDT reset is generated.
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allOf:
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- $ref: watchdog.yaml#
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properties:
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compatible:
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enum:
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- xlnx,xps-timebase-wdt-1.01.a
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- xlnx,xps-timebase-wdt-1.00.a
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-frequency:
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description: Frequency of clock in Hz
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xlnx,wdt-interval:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Watchdog timeout interval
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minimum: 8
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maximum: 32
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xlnx,wdt-enable-once:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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description: If watchdog is configured as enable once,
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then the watchdog cannot be disabled after
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it has been enabled.
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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watchdog@40100000 {
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compatible = "xlnx,xps-timebase-wdt-1.00.a";
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reg = <0x40100000 0x1000>;
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clock-frequency = <50000000>;
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clocks = <&clkc 15>;
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xlnx,wdt-enable-once = <0x0>;
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xlnx,wdt-interval = <0x1b>;
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};
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...
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