86 lines
1.7 KiB
YAML
86 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra20 S/PDIF Controller
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description: |
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The S/PDIF controller supports both input and output in serial audio
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digital interface format. The input controller can digitally recover
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a clock from the received stream. The S/PDIF controller is also used
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to generate the embedded audio for HDMI output channel.
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maintainers:
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- Thierry Reding <treding@nvidia.com>
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- Jon Hunter <jonathanh@nvidia.com>
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properties:
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compatible:
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const: nvidia,tegra20-spdif
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reg:
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maxItems: 1
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resets:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 2
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clock-names:
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items:
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- const: out
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- const: in
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dmas:
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minItems: 2
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dma-names:
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items:
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- const: rx
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- const: tx
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"#sound-dai-cells":
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const: 0
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nvidia,fixed-parent-rate:
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description: |
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Specifies whether board prefers parent clock to stay at a fixed rate.
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This allows multiple Tegra20 audio components work simultaneously by
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limiting number of supportable audio rates.
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type: boolean
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required:
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- compatible
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- reg
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- resets
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- interrupts
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- clocks
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- clock-names
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- dmas
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- dma-names
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- "#sound-dai-cells"
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additionalProperties: false
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examples:
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- |
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spdif@70002400 {
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compatible = "nvidia,tegra20-spdif";
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reg = <0x70002400 0x200>;
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interrupts = <77>;
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clocks = <&clk 99>, <&clk 98>;
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clock-names = "out", "in";
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resets = <&rst 10>;
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dmas = <&apbdma 3>, <&apbdma 3>;
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dma-names = "rx", "tx";
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#sound-dai-cells = <0>;
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};
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...
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