109 lines
2.7 KiB
YAML
109 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip I2S Multi-Channel Controller
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maintainers:
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- Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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description:
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The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
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supports a Time Division Multiplexed (TDM) interface with external
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multi-channel audio codecs. It consists of a receiver, a transmitter and a
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common clock generator that can be enabled separately to provide Adapter,
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Client or Controller modes with receiver and/or transmitter active.
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On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
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multi-channel is supported by using multiple data pins, output and
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input, without TDM.
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properties:
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"#sound-dai-cells":
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const: 0
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compatible:
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enum:
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- microchip,sam9x60-i2smcc
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- microchip,sama7g5-i2smcc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Peripheral Bus Clock
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- description: Generic Clock (Optional). Should be set mostly when Master
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Mode is required.
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minItems: 1
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clock-names:
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items:
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- const: pclk
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- const: gclk
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minItems: 1
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dmas:
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items:
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- description: TX DMA Channel
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- description: RX DMA Channel
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dma-names:
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items:
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- const: tx
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- const: rx
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microchip,tdm-data-pair:
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description:
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Represents the DIN/DOUT pair pins that are used to receive/send
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TDM data. It is optional and it is only needed if the controller
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uses the TDM mode.
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$ref: /schemas/types.yaml#/definitions/uint8
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enum: [0, 1, 2, 3]
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default: 0
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if:
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properties:
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compatible:
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const: microchip,sam9x60-i2smcc
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then:
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properties:
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microchip,tdm-data-pair: false
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required:
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- "#sound-dai-cells"
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- dmas
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- dma-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/dma/at91.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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i2s@f001c000 {
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#sound-dai-cells = <0>;
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compatible = "microchip,sam9x60-i2smcc";
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reg = <0xf001c000 0x100>;
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interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(36))>,
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<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(37))>;
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dma-names = "tx", "rx";
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clocks = <&i2s_clk>, <&i2s_gclk>;
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clock-names = "pclk", "gclk";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2s_default>;
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};
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