210 lines
5.4 KiB
YAML
210 lines
5.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/xilinx/xlnx,csi2rxss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Xilinx MIPI CSI-2 Receiver Subsystem
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maintainers:
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- Vishal Sagar <vishal.sagar@xilinx.com>
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description: |
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The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
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traffic from compliant camera sensors and send the output as AXI4 Stream
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video data for image processing.
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The subsystem consists of a MIPI D-PHY in slave mode which captures the
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data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
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packet data. The optional Video Format Bridge (VFB) converts this data to
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AXI4 Stream video data.
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For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
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Please note that this bindings includes only the MIPI CSI-2 Rx controller
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and Video Format Bridge and not D-PHY.
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properties:
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compatible:
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items:
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- enum:
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- xlnx,mipi-csi2-rx-subsystem-5.0
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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description: List of clock specifiers
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items:
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- description: AXI Lite clock
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- description: Video clock
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clock-names:
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items:
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- const: lite_aclk
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- const: video_aclk
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xlnx,csi-pxl-format:
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description: |
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This denotes the CSI Data type selected in hw design.
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Packets other than this data type (except for RAW8 and
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User defined data types) will be filtered out.
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Possible values are as below -
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0x1e - YUV4228B
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0x1f - YUV42210B
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0x20 - RGB444
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0x21 - RGB555
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0x22 - RGB565
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0x23 - RGB666
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0x24 - RGB888
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0x28 - RAW6
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0x29 - RAW7
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0x2a - RAW8
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0x2b - RAW10
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0x2c - RAW12
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0x2d - RAW14
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0x2e - RAW16
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0x2f - RAW20
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$ref: /schemas/types.yaml#/definitions/uint32
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oneOf:
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- minimum: 0x1e
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maximum: 0x24
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- minimum: 0x28
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maximum: 0x2f
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xlnx,vfb:
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type: boolean
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description: Present when Video Format Bridge is enabled in IP configuration
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xlnx,en-csi-v2-0:
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type: boolean
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description: Present if CSI v2 is enabled in IP configuration.
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xlnx,en-vcx:
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type: boolean
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description: |
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When present, there are maximum 16 virtual channels, else only 4.
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xlnx,en-active-lanes:
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type: boolean
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description: |
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Present if the number of active lanes can be re-configured at
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runtime in the Protocol Configuration Register. Otherwise all lanes,
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as set in IP configuration, are always active.
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video-reset-gpios:
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description: Optional specifier for a GPIO that asserts video_aresetn.
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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description: |
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Input / sink port node, single endpoint describing the
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CSI-2 transmitter.
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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data-lanes:
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description: |
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This is required only in the sink port 0 endpoint which
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connects to MIPI CSI-2 source like sensor.
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The possible values are -
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1 - For 1 lane enabled in IP.
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1 2 - For 2 lanes enabled in IP.
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1 2 3 - For 3 lanes enabled in IP.
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1 2 3 4 - For 4 lanes enabled in IP.
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items:
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- const: 1
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- const: 2
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- const: 3
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- const: 4
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required:
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- data-lanes
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unevaluatedProperties: false
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Output / source port node, endpoint describing modules
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connected the CSI-2 receiver.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- ports
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allOf:
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- if:
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required:
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- xlnx,vfb
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then:
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required:
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- xlnx,csi-pxl-format
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else:
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properties:
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xlnx,csi-pxl-format: false
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- if:
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not:
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required:
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- xlnx,en-csi-v2-0
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then:
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properties:
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xlnx,en-vcx: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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xcsi2rxss_1: csi2rx@a0020000 {
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compatible = "xlnx,mipi-csi2-rx-subsystem-5.0";
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reg = <0xa0020000 0x10000>;
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interrupt-parent = <&gic>;
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interrupts = <0 95 4>;
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xlnx,csi-pxl-format = <0x2a>;
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xlnx,vfb;
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xlnx,en-active-lanes;
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xlnx,en-csi-v2-0;
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xlnx,en-vcx;
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clock-names = "lite_aclk", "video_aclk";
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clocks = <&misc_clk_0>, <&misc_clk_1>;
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video-reset-gpios = <&gpio 86 GPIO_ACTIVE_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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/* Sink port */
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reg = <0>;
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csiss_in: endpoint {
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data-lanes = <1 2 3 4>;
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/* MIPI CSI-2 Camera handle */
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remote-endpoint = <&camera_out>;
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};
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};
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port@1 {
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/* Source port */
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reg = <1>;
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csiss_out: endpoint {
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remote-endpoint = <&vproc_in>;
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};
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};
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};
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};
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...
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