62 lines
1.7 KiB
C
62 lines
1.7 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// Copyright (c) 2021 Mediatek Corporation. All rights reserved.
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//
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// Author: YC Hung <yc.hung@mediatek.com>
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//
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// Hardware interface for mt8195 DSP code loader
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#include <sound/sof.h>
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#include "mt8195.h"
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#include "../../ops.h"
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void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
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{
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/* ADSP bootup base */
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snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_ALTRESETVEC, boot_addr);
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/* pull high RunStall (set bit3 to 1) */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
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ADSP_RUNSTALL, ADSP_RUNSTALL);
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/* pull high StatVectorSel to use AltResetVec (set bit4 to 1) */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
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STATVECTOR_SEL, STATVECTOR_SEL);
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/* toggle DReset & BReset */
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/* pull high DReset & BReset */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
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ADSP_BRESET_SW | ADSP_DRESET_SW,
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ADSP_BRESET_SW | ADSP_DRESET_SW);
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/* delay 10 DSP cycles at 26M about 1us by IP vendor's suggestion */
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udelay(1);
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/* pull low DReset & BReset */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
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ADSP_BRESET_SW | ADSP_DRESET_SW,
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0);
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/* Enable PDebug */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_PDEBUGBUS0,
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PDEBUG_ENABLE,
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PDEBUG_ENABLE);
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/* release RunStall (set bit3 to 0) */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
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ADSP_RUNSTALL, 0);
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}
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void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev)
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{
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/* RUN_STALL pull high again to reset */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
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ADSP_RUNSTALL, ADSP_RUNSTALL);
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/* pull high DReset & BReset */
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snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
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ADSP_BRESET_SW | ADSP_DRESET_SW,
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ADSP_BRESET_SW | ADSP_DRESET_SW);
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}
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