572 lines
16 KiB
C
572 lines
16 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Common library for ADIS16XXX devices
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*
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* Copyright 2012 Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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*/
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#ifndef __IIO_ADIS_H__
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#define __IIO_ADIS_H__
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#include <linux/spi/spi.h>
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#include <linux/interrupt.h>
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#include <linux/iio/types.h>
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#define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
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#define ADIS_READ_REG(reg) ((reg) & 0x7f)
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#define ADIS_PAGE_SIZE 0x80
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#define ADIS_REG_PAGE_ID 0x00
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struct adis;
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/**
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* struct adis_timeouts - ADIS chip variant timeouts
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* @reset_ms - Wait time after rst pin goes inactive
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* @sw_reset_ms - Wait time after sw reset command
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* @self_test_ms - Wait time after self test command
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*/
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struct adis_timeout {
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u16 reset_ms;
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u16 sw_reset_ms;
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u16 self_test_ms;
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};
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/**
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* struct adis_data - ADIS chip variant specific data
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* @read_delay: SPI delay for read operations in us
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* @write_delay: SPI delay for write operations in us
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* @cs_change_delay: SPI delay between CS changes in us
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* @glob_cmd_reg: Register address of the GLOB_CMD register
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* @msc_ctrl_reg: Register address of the MSC_CTRL register
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* @diag_stat_reg: Register address of the DIAG_STAT register
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* @prod_id_reg: Register address of the PROD_ID register
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* @prod_id: Product ID code that should be expected when reading @prod_id_reg
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* @self_test_mask: Bitmask of supported self-test operations
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* @self_test_reg: Register address to request self test command
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* @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg
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* @status_error_msgs: Array of error messages
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* @status_error_mask: Bitmask of errors supported by the device
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* @timeouts: Chip specific delays
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* @enable_irq: Hook for ADIS devices that have a special IRQ enable/disable
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* @unmasked_drdy: True for devices that cannot mask/unmask the data ready pin
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* @has_paging: True if ADIS device has paged registers
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* @burst_reg_cmd: Register command that triggers burst
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* @burst_len: Burst size in the SPI RX buffer. If @burst_max_len is defined,
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* this should be the minimum size supported by the device.
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* @burst_max_len: Holds the maximum burst size when the device supports
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* more than one burst mode with different sizes
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* @burst_max_speed_hz: Maximum spi speed that can be used in burst mode
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*/
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struct adis_data {
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unsigned int read_delay;
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unsigned int write_delay;
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unsigned int cs_change_delay;
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unsigned int glob_cmd_reg;
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unsigned int msc_ctrl_reg;
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unsigned int diag_stat_reg;
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unsigned int prod_id_reg;
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unsigned int prod_id;
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unsigned int self_test_mask;
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unsigned int self_test_reg;
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bool self_test_no_autoclear;
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const struct adis_timeout *timeouts;
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const char * const *status_error_msgs;
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unsigned int status_error_mask;
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int (*enable_irq)(struct adis *adis, bool enable);
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bool unmasked_drdy;
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bool has_paging;
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unsigned int burst_reg_cmd;
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unsigned int burst_len;
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unsigned int burst_max_len;
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unsigned int burst_max_speed_hz;
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};
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/**
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* struct adis - ADIS device instance data
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* @spi: Reference to SPI device which owns this ADIS IIO device
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* @trig: IIO trigger object data
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* @data: ADIS chip variant specific data
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* @burst: ADIS burst transfer information
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* @burst_extra_len: Burst extra length. Should only be used by devices that can
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* dynamically change their burst mode length.
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* @state_lock: Lock used by the device to protect state
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* @msg: SPI message object
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* @xfer: SPI transfer objects to be used for a @msg
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* @current_page: Some ADIS devices have registers, this selects current page
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* @irq_flag: IRQ handling flags as passed to request_irq()
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* @buffer: Data buffer for information read from the device
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* @tx: DMA safe TX buffer for SPI transfers
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* @rx: DMA safe RX buffer for SPI transfers
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*/
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struct adis {
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struct spi_device *spi;
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struct iio_trigger *trig;
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const struct adis_data *data;
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unsigned int burst_extra_len;
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/**
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* The state_lock is meant to be used during operations that require
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* a sequence of SPI R/W in order to protect the SPI transfer
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* information (fields 'xfer', 'msg' & 'current_page') between
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* potential concurrent accesses.
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* This lock is used by all "adis_{functions}" that have to read/write
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* registers. These functions also have unlocked variants
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* (see "__adis_{functions}"), which don't hold this lock.
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* This allows users of the ADIS library to group SPI R/W into
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* the drivers, but they also must manage this lock themselves.
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*/
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struct mutex state_lock;
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struct spi_message msg;
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struct spi_transfer *xfer;
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unsigned int current_page;
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unsigned long irq_flag;
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void *buffer;
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u8 tx[10] ____cacheline_aligned;
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u8 rx[4];
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};
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int adis_init(struct adis *adis, struct iio_dev *indio_dev,
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struct spi_device *spi, const struct adis_data *data);
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int __adis_reset(struct adis *adis);
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/**
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* adis_reset() - Reset the device
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* @adis: The adis device
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*
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* Returns 0 on success, a negative error code otherwise
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*/
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static inline int adis_reset(struct adis *adis)
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{
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int ret;
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mutex_lock(&adis->state_lock);
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ret = __adis_reset(adis);
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mutex_unlock(&adis->state_lock);
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return ret;
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}
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int __adis_write_reg(struct adis *adis, unsigned int reg,
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unsigned int val, unsigned int size);
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int __adis_read_reg(struct adis *adis, unsigned int reg,
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unsigned int *val, unsigned int size);
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/**
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* __adis_write_reg_8() - Write single byte to a register (unlocked)
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* @adis: The adis device
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* @reg: The address of the register to be written
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* @value: The value to write
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*/
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static inline int __adis_write_reg_8(struct adis *adis, unsigned int reg,
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u8 val)
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{
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return __adis_write_reg(adis, reg, val, 1);
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}
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/**
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* __adis_write_reg_16() - Write 2 bytes to a pair of registers (unlocked)
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @value: Value to be written
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*/
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static inline int __adis_write_reg_16(struct adis *adis, unsigned int reg,
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u16 val)
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{
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return __adis_write_reg(adis, reg, val, 2);
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}
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/**
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* __adis_write_reg_32() - write 4 bytes to four registers (unlocked)
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* @adis: The adis device
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* @reg: The address of the lower of the four register
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* @value: Value to be written
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*/
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static inline int __adis_write_reg_32(struct adis *adis, unsigned int reg,
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u32 val)
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{
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return __adis_write_reg(adis, reg, val, 4);
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}
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/**
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* __adis_read_reg_16() - read 2 bytes from a 16-bit register (unlocked)
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @val: The value read back from the device
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*/
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static inline int __adis_read_reg_16(struct adis *adis, unsigned int reg,
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u16 *val)
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{
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unsigned int tmp;
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int ret;
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ret = __adis_read_reg(adis, reg, &tmp, 2);
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if (ret == 0)
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*val = tmp;
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return ret;
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}
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/**
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* __adis_read_reg_32() - read 4 bytes from a 32-bit register (unlocked)
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @val: The value read back from the device
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*/
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static inline int __adis_read_reg_32(struct adis *adis, unsigned int reg,
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u32 *val)
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{
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unsigned int tmp;
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int ret;
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ret = __adis_read_reg(adis, reg, &tmp, 4);
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if (ret == 0)
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*val = tmp;
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return ret;
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}
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/**
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* adis_write_reg() - write N bytes to register
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @value: The value to write to device (up to 4 bytes)
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* @size: The size of the @value (in bytes)
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*/
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static inline int adis_write_reg(struct adis *adis, unsigned int reg,
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unsigned int val, unsigned int size)
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{
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int ret;
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mutex_lock(&adis->state_lock);
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ret = __adis_write_reg(adis, reg, val, size);
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mutex_unlock(&adis->state_lock);
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return ret;
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}
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/**
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* adis_read_reg() - read N bytes from register
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @val: The value read back from the device
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* @size: The size of the @val buffer
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*/
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static int adis_read_reg(struct adis *adis, unsigned int reg,
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unsigned int *val, unsigned int size)
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{
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int ret;
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mutex_lock(&adis->state_lock);
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ret = __adis_read_reg(adis, reg, val, size);
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mutex_unlock(&adis->state_lock);
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return ret;
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}
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/**
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* adis_write_reg_8() - Write single byte to a register
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* @adis: The adis device
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* @reg: The address of the register to be written
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* @value: The value to write
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*/
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static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
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u8 val)
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{
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return adis_write_reg(adis, reg, val, 1);
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}
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/**
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* adis_write_reg_16() - Write 2 bytes to a pair of registers
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @value: Value to be written
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*/
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static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
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u16 val)
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{
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return adis_write_reg(adis, reg, val, 2);
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}
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/**
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* adis_write_reg_32() - write 4 bytes to four registers
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* @adis: The adis device
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* @reg: The address of the lower of the four register
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* @value: Value to be written
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*/
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static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
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u32 val)
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{
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return adis_write_reg(adis, reg, val, 4);
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}
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/**
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* adis_read_reg_16() - read 2 bytes from a 16-bit register
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @val: The value read back from the device
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*/
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static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
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u16 *val)
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{
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unsigned int tmp;
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int ret;
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ret = adis_read_reg(adis, reg, &tmp, 2);
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if (ret == 0)
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*val = tmp;
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return ret;
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}
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/**
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* adis_read_reg_32() - read 4 bytes from a 32-bit register
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @val: The value read back from the device
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*/
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static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
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u32 *val)
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{
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unsigned int tmp;
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int ret;
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ret = adis_read_reg(adis, reg, &tmp, 4);
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if (ret == 0)
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*val = tmp;
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return ret;
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}
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int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask,
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const u32 val, u8 size);
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/**
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* adis_update_bits_base() - ADIS Update bits function - Locked version
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @mask: Bitmask to change
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* @val: Value to be written
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* @size: Size of the register to update
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*
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* Updates the desired bits of @reg in accordance with @mask and @val.
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*/
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static inline int adis_update_bits_base(struct adis *adis, unsigned int reg,
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const u32 mask, const u32 val, u8 size)
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{
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int ret;
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mutex_lock(&adis->state_lock);
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ret = __adis_update_bits_base(adis, reg, mask, val, size);
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mutex_unlock(&adis->state_lock);
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return ret;
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}
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/**
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* adis_update_bits() - Wrapper macro for adis_update_bits_base - Locked version
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @mask: Bitmask to change
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* @val: Value to be written
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*
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* This macro evaluates the sizeof of @val at compile time and calls
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* adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
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* @val can lead to undesired behavior if the register to update is 16bit.
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*/
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#define adis_update_bits(adis, reg, mask, val) ({ \
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BUILD_BUG_ON(sizeof(val) != 2 && sizeof(val) != 4); \
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adis_update_bits_base(adis, reg, mask, val, sizeof(val)); \
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})
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/**
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* adis_update_bits() - Wrapper macro for adis_update_bits_base
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @mask: Bitmask to change
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* @val: Value to be written
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*
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* This macro evaluates the sizeof of @val at compile time and calls
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* adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
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* @val can lead to undesired behavior if the register to update is 16bit.
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*/
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#define __adis_update_bits(adis, reg, mask, val) ({ \
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BUILD_BUG_ON(sizeof(val) != 2 && sizeof(val) != 4); \
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__adis_update_bits_base(adis, reg, mask, val, sizeof(val)); \
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})
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int __adis_check_status(struct adis *adis);
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int __adis_initial_startup(struct adis *adis);
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int __adis_enable_irq(struct adis *adis, bool enable);
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static inline int adis_enable_irq(struct adis *adis, bool enable)
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{
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int ret;
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mutex_lock(&adis->state_lock);
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ret = __adis_enable_irq(adis, enable);
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mutex_unlock(&adis->state_lock);
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return ret;
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}
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static inline int adis_check_status(struct adis *adis)
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{
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int ret;
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mutex_lock(&adis->state_lock);
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ret = __adis_check_status(adis);
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mutex_unlock(&adis->state_lock);
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return ret;
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}
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/* locked version of __adis_initial_startup() */
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static inline int adis_initial_startup(struct adis *adis)
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{
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int ret;
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mutex_lock(&adis->state_lock);
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ret = __adis_initial_startup(adis);
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mutex_unlock(&adis->state_lock);
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return ret;
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}
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static inline void adis_dev_lock(struct adis *adis)
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{
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mutex_lock(&adis->state_lock);
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}
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static inline void adis_dev_unlock(struct adis *adis)
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{
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mutex_unlock(&adis->state_lock);
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}
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int adis_single_conversion(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int error_mask, int *val);
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#define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (chan), \
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.extend_name = name, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_all = info_all, \
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.address = (addr), \
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.scan_index = (si), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (bits), \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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}
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#define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
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ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
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#define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
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ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
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#define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
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.type = IIO_TEMP, \
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.indexed = 1, \
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.channel = 0, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_OFFSET), \
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.info_mask_shared_by_all = info_all, \
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.address = (addr), \
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.scan_index = (si), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (bits), \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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}
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#define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
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.type = (_type), \
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.modified = 1, \
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.channel2 = IIO_MOD_ ## mod, \
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|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
|
|
(info_sep), \
|
|
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
|
|
.info_mask_shared_by_all = info_all, \
|
|
.address = (addr), \
|
|
.scan_index = (si), \
|
|
.scan_type = { \
|
|
.sign = 's', \
|
|
.realbits = (bits), \
|
|
.storagebits = 16, \
|
|
.endianness = IIO_BE, \
|
|
}, \
|
|
}
|
|
|
|
#define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
|
|
ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
|
|
|
|
#define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) \
|
|
ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
|
|
|
|
#define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
|
|
ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
|
|
|
|
#define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
|
|
ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
|
|
|
|
#ifdef CONFIG_IIO_ADIS_LIB_BUFFER
|
|
|
|
int
|
|
devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
|
|
irq_handler_t trigger_handler);
|
|
|
|
int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
|
|
|
|
int adis_update_scan_mode(struct iio_dev *indio_dev,
|
|
const unsigned long *scan_mask);
|
|
|
|
#else /* CONFIG_IIO_BUFFER */
|
|
|
|
static inline int
|
|
devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
|
|
irq_handler_t trigger_handler)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline int devm_adis_probe_trigger(struct adis *adis,
|
|
struct iio_dev *indio_dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
#define adis_update_scan_mode NULL
|
|
|
|
#endif /* CONFIG_IIO_BUFFER */
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
int adis_debugfs_reg_access(struct iio_dev *indio_dev,
|
|
unsigned int reg, unsigned int writeval,
|
|
unsigned int *readval);
|
|
|
|
#else
|
|
|
|
#define adis_debugfs_reg_access NULL
|
|
|
|
#endif
|
|
|
|
#endif
|