122 lines
2.3 KiB
C
122 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* GPIO definitions for Amlogic Meson8b SoCs
|
|
*
|
|
* Copyright (C) 2015 Endless Mobile, Inc.
|
|
* Author: Carlo Caione <carlo@endlessm.com>
|
|
*/
|
|
|
|
#ifndef _DT_BINDINGS_MESON8B_GPIO_H
|
|
#define _DT_BINDINGS_MESON8B_GPIO_H
|
|
|
|
/* EE (CBUS) GPIO chip */
|
|
#define GPIOX_0 0
|
|
#define GPIOX_1 1
|
|
#define GPIOX_2 2
|
|
#define GPIOX_3 3
|
|
#define GPIOX_4 4
|
|
#define GPIOX_5 5
|
|
#define GPIOX_6 6
|
|
#define GPIOX_7 7
|
|
#define GPIOX_8 8
|
|
#define GPIOX_9 9
|
|
#define GPIOX_10 10
|
|
#define GPIOX_11 11
|
|
#define GPIOX_16 12
|
|
#define GPIOX_17 13
|
|
#define GPIOX_18 14
|
|
#define GPIOX_19 15
|
|
#define GPIOX_20 16
|
|
#define GPIOX_21 17
|
|
|
|
#define GPIOY_0 18
|
|
#define GPIOY_1 19
|
|
#define GPIOY_3 20
|
|
#define GPIOY_6 21
|
|
#define GPIOY_7 22
|
|
#define GPIOY_8 23
|
|
#define GPIOY_9 24
|
|
#define GPIOY_10 25
|
|
#define GPIOY_11 26
|
|
#define GPIOY_12 27
|
|
#define GPIOY_13 28
|
|
#define GPIOY_14 29
|
|
|
|
#define GPIODV_9 30
|
|
#define GPIODV_24 31
|
|
#define GPIODV_25 32
|
|
#define GPIODV_26 33
|
|
#define GPIODV_27 34
|
|
#define GPIODV_28 35
|
|
#define GPIODV_29 36
|
|
|
|
#define GPIOH_0 37
|
|
#define GPIOH_1 38
|
|
#define GPIOH_2 39
|
|
#define GPIOH_3 40
|
|
#define GPIOH_4 41
|
|
#define GPIOH_5 42
|
|
#define GPIOH_6 43
|
|
#define GPIOH_7 44
|
|
#define GPIOH_8 45
|
|
#define GPIOH_9 46
|
|
|
|
#define CARD_0 47
|
|
#define CARD_1 48
|
|
#define CARD_2 49
|
|
#define CARD_3 50
|
|
#define CARD_4 51
|
|
#define CARD_5 52
|
|
#define CARD_6 53
|
|
|
|
#define BOOT_0 54
|
|
#define BOOT_1 55
|
|
#define BOOT_2 56
|
|
#define BOOT_3 57
|
|
#define BOOT_4 58
|
|
#define BOOT_5 59
|
|
#define BOOT_6 60
|
|
#define BOOT_7 61
|
|
#define BOOT_8 62
|
|
#define BOOT_9 63
|
|
#define BOOT_10 64
|
|
#define BOOT_11 65
|
|
#define BOOT_12 66
|
|
#define BOOT_13 67
|
|
#define BOOT_14 68
|
|
#define BOOT_15 69
|
|
#define BOOT_16 70
|
|
#define BOOT_17 71
|
|
#define BOOT_18 72
|
|
|
|
#define DIF_0_P 73
|
|
#define DIF_0_N 74
|
|
#define DIF_1_P 75
|
|
#define DIF_1_N 76
|
|
#define DIF_2_P 77
|
|
#define DIF_2_N 78
|
|
#define DIF_3_P 79
|
|
#define DIF_3_N 80
|
|
#define DIF_4_P 81
|
|
#define DIF_4_N 82
|
|
|
|
/* AO GPIO chip */
|
|
#define GPIOAO_0 0
|
|
#define GPIOAO_1 1
|
|
#define GPIOAO_2 2
|
|
#define GPIOAO_3 3
|
|
#define GPIOAO_4 4
|
|
#define GPIOAO_5 5
|
|
#define GPIOAO_6 6
|
|
#define GPIOAO_7 7
|
|
#define GPIOAO_8 8
|
|
#define GPIOAO_9 9
|
|
#define GPIOAO_10 10
|
|
#define GPIOAO_11 11
|
|
#define GPIOAO_12 12
|
|
#define GPIOAO_13 13
|
|
#define GPIO_BSD_EN 14
|
|
#define GPIO_TEST_N 15
|
|
|
|
#endif /* _DT_BINDINGS_MESON8B_GPIO_H */
|