423 lines
13 KiB
C
423 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2022 Collabora Ltd.
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// Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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//
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// Based on mt6323-regulator.c,
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// Copyright (c) 2016 MediaTek Inc.
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//
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/mt6397/core.h>
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#include <linux/mfd/mt6332/registers.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/mt6332-regulator.h>
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#include <linux/regulator/of_regulator.h>
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#define MT6332_LDO_MODE_NORMAL 0
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#define MT6332_LDO_MODE_LP 1
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/*
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* MT6332 regulators information
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*
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* @desc: standard fields of regulator description.
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* @qi: Mask for query enable signal status of regulators
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* @vselon_reg: Register sections for hardware control mode of bucks
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* @vselctrl_reg: Register for controlling the buck control mode.
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* @vselctrl_mask: Mask for query buck's voltage control mode.
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* @status_reg: Register for regulator enable status where qi unavailable
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* @status_mask: Mask for querying regulator enable status
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*/
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struct mt6332_regulator_info {
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struct regulator_desc desc;
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u32 qi;
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u32 vselon_reg;
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u32 vselctrl_reg;
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u32 vselctrl_mask;
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u32 modeset_reg;
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u32 modeset_mask;
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u32 status_reg;
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u32 status_mask;
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};
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#define MT6332_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
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vosel, vosel_mask, voselon, vosel_ctrl) \
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[MT6332_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6332_buck_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6332_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = (max - min)/step + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(0), \
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}, \
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.qi = BIT(13), \
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.vselon_reg = voselon, \
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.vselctrl_reg = vosel_ctrl, \
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.vselctrl_mask = BIT(1), \
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.status_mask = 0, \
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}
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#define MT6332_LDO_LINEAR(match, vreg, min, max, step, volt_ranges, \
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enreg, vosel, vosel_mask, voselon, \
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vosel_ctrl, _modeset_reg, _modeset_mask) \
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[MT6332_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6332_ldo_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6332_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = (max - min)/step + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(0), \
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}, \
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.qi = BIT(15), \
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.vselon_reg = voselon, \
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.vselctrl_reg = vosel_ctrl, \
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.vselctrl_mask = BIT(1), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = _modeset_mask, \
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.status_mask = 0, \
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}
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#define MT6332_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \
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[MT6332_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6332_volt_table_ao_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6332_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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}, \
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}
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#define MT6332_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
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vosel_mask, _modeset_reg, _modeset_mask) \
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[MT6332_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6332_volt_table_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6332_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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}, \
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.qi = BIT(15), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = _modeset_mask, \
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.status_mask = 0, \
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}
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#define MT6332_REG_FIXED(match, vreg, enreg, enbit, qibit, volt, stbit) \
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[MT6332_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6332_volt_fixed_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6332_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = 1, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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.min_uV = volt, \
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}, \
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.qi = BIT(qibit), \
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.status_reg = MT6332_EN_STATUS0, \
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.status_mask = BIT(stbit), \
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}
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static const struct linear_range boost_volt_range[] = {
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REGULATOR_LINEAR_RANGE(3500000, 0, 0x7f, 31250),
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};
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static const struct linear_range buck_volt_range[] = {
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REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
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};
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static const struct linear_range buck_pa_volt_range[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
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};
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static const struct linear_range buck_rf_volt_range[] = {
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REGULATOR_LINEAR_RANGE(1050000, 0, 0x7f, 9375),
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};
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static const unsigned int ldo_volt_table1[] = {
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2800000, 3000000, 0, 3200000
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};
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static const unsigned int ldo_volt_table2[] = {
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1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000,
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};
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static int mt6332_get_status(struct regulator_dev *rdev)
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{
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struct mt6332_regulator_info *info = rdev_get_drvdata(rdev);
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u32 reg, en_mask, regval;
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int ret;
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if (info->qi > 0) {
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reg = info->desc.enable_reg;
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en_mask = info->qi;
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} else {
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reg = info->status_reg;
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en_mask = info->status_mask;
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}
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ret = regmap_read(rdev->regmap, reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
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return ret;
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}
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return (regval & en_mask) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
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}
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static int mt6332_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
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{
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struct mt6332_regulator_info *info = rdev_get_drvdata(rdev);
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int val;
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switch (mode) {
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case REGULATOR_MODE_STANDBY:
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val = MT6332_LDO_MODE_LP;
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break;
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case REGULATOR_MODE_NORMAL:
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val = MT6332_LDO_MODE_NORMAL;
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break;
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default:
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return -EINVAL;
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}
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val <<= ffs(info->modeset_mask) - 1;
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return regmap_update_bits(rdev->regmap, info->modeset_reg,
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info->modeset_mask, val);
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}
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static unsigned int mt6332_ldo_get_mode(struct regulator_dev *rdev)
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{
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struct mt6332_regulator_info *info = rdev_get_drvdata(rdev);
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unsigned int val;
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int ret;
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ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
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if (ret < 0)
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return ret;
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val &= info->modeset_mask;
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val >>= ffs(info->modeset_mask) - 1;
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return (val & BIT(0)) ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
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}
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static const struct regulator_ops mt6332_buck_volt_range_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6332_get_status,
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};
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static const struct regulator_ops mt6332_ldo_volt_range_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6332_get_status,
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.set_mode = mt6332_ldo_set_mode,
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.get_mode = mt6332_ldo_get_mode,
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};
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static const struct regulator_ops mt6332_volt_table_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_iterate,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6332_get_status,
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.set_mode = mt6332_ldo_set_mode,
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.get_mode = mt6332_ldo_get_mode,
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};
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static const struct regulator_ops mt6332_volt_table_ao_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_iterate,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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};
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static const struct regulator_ops mt6332_volt_fixed_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6332_get_status,
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};
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/* The array is indexed by id(MT6332_ID_XXX) */
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static struct mt6332_regulator_info mt6332_regulators[] = {
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MT6332_BUCK("buck-vdram", VDRAM, 700000, 1493750, 6250, buck_volt_range,
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MT6332_EN_STATUS0, MT6332_VDRAM_CON11, GENMASK(6, 0),
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MT6332_VDRAM_CON12, MT6332_VDRAM_CON7),
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MT6332_BUCK("buck-vdvfs2", VDVFS2, 700000, 1312500, 6250, buck_volt_range,
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MT6332_VDVFS2_CON9, MT6332_VDVFS2_CON11, GENMASK(6, 0),
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MT6332_VDVFS2_CON12, MT6332_VDVFS2_CON7),
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MT6332_BUCK("buck-vpa", VPA, 500000, 3400000, 50000, buck_pa_volt_range,
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MT6332_VPA_CON9, MT6332_VPA_CON11, GENMASK(5, 0),
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MT6332_VPA_CON12, MT6332_VPA_CON7),
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MT6332_BUCK("buck-vrf18a", VRF1, 1050000, 2240625, 9375, buck_rf_volt_range,
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MT6332_VRF1_CON9, MT6332_VRF1_CON11, GENMASK(6, 0),
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MT6332_VRF1_CON12, MT6332_VRF1_CON7),
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MT6332_BUCK("buck-vrf18b", VRF2, 1050000, 2240625, 9375, buck_rf_volt_range,
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MT6332_VRF2_CON9, MT6332_VRF2_CON11, GENMASK(6, 0),
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MT6332_VRF2_CON12, MT6332_VRF2_CON7),
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MT6332_BUCK("buck-vsbst", VSBST, 3500000, 7468750, 31250, boost_volt_range,
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MT6332_VSBST_CON8, MT6332_VSBST_CON12, GENMASK(6, 0),
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MT6332_VSBST_CON13, MT6332_VSBST_CON8),
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MT6332_LDO("ldo-vauxb32", VAUXB32, ldo_volt_table1, MT6332_LDO_CON1, 10,
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MT6332_LDO_CON9, GENMASK(6, 5), MT6332_LDO_CON1, GENMASK(1, 0)),
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MT6332_REG_FIXED("ldo-vbif28", VBIF28, MT6332_LDO_CON2, 10, 0, 2800000, 1),
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MT6332_REG_FIXED("ldo-vusb33", VUSB33, MT6332_LDO_CON3, 10, 0, 3300000, 2),
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MT6332_LDO_LINEAR("ldo-vsram", VSRAM_DVFS2, 700000, 1493750, 6250, buck_volt_range,
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MT6332_EN_STATUS0, MT6332_LDO_CON8, GENMASK(15, 9),
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MT6332_VDVFS2_CON23, MT6332_VDVFS2_CON22,
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MT6332_LDO_CON5, GENMASK(1, 0)),
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MT6332_LDO_AO("ldo-vdig18", VDIG18, ldo_volt_table2, MT6332_LDO_CON12, GENMASK(11, 9)),
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};
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static int mt6332_set_buck_vosel_reg(struct platform_device *pdev)
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{
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struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent);
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int i;
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u32 regval;
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for (i = 0; i < MT6332_ID_VREG_MAX; i++) {
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if (mt6332_regulators[i].vselctrl_reg) {
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if (regmap_read(mt6332->regmap,
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mt6332_regulators[i].vselctrl_reg,
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®val) < 0) {
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dev_err(&pdev->dev,
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"Failed to read buck ctrl\n");
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return -EIO;
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}
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if (regval & mt6332_regulators[i].vselctrl_mask) {
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mt6332_regulators[i].desc.vsel_reg =
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mt6332_regulators[i].vselon_reg;
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}
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}
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}
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return 0;
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}
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static int mt6332_regulator_probe(struct platform_device *pdev)
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{
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struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent);
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struct regulator_config config = {};
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struct regulator_dev *rdev;
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int i;
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u32 reg_value;
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/* Query buck controller to select activated voltage register part */
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if (mt6332_set_buck_vosel_reg(pdev))
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return -EIO;
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/* Read PMIC chip revision to update constraints and voltage table */
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if (regmap_read(mt6332->regmap, MT6332_HWCID, ®_value) < 0) {
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dev_err(&pdev->dev, "Failed to read Chip ID\n");
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return -EIO;
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}
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reg_value &= GENMASK(7, 0);
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dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
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/*
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* ChipID 0x10 is "MT6332 E1", has a different voltage table and
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* it's currently not supported in this driver. Upon detection of
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* this ID, refuse to register the regulators, as we will wrongly
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* interpret the VSEL for this revision, potentially overvolting
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* some device.
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*/
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if (reg_value == 0x10) {
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dev_err(&pdev->dev, "Chip version not supported. Bailing out.\n");
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return -EINVAL;
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}
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for (i = 0; i < MT6332_ID_VREG_MAX; i++) {
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config.dev = &pdev->dev;
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config.driver_data = &mt6332_regulators[i];
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config.regmap = mt6332->regmap;
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rdev = devm_regulator_register(&pdev->dev,
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&mt6332_regulators[i].desc, &config);
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if (IS_ERR(rdev)) {
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dev_err(&pdev->dev, "failed to register %s\n",
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mt6332_regulators[i].desc.name);
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return PTR_ERR(rdev);
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}
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}
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return 0;
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}
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static const struct platform_device_id mt6332_platform_ids[] = {
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{"mt6332-regulator", 0},
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(platform, mt6332_platform_ids);
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static struct platform_driver mt6332_regulator_driver = {
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.driver = {
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.name = "mt6332-regulator",
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},
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.probe = mt6332_regulator_probe,
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.id_table = mt6332_platform_ids,
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};
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module_platform_driver(mt6332_regulator_driver);
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MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>");
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MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6332 PMIC");
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MODULE_LICENSE("GPL");
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