261 lines
6.8 KiB
C
261 lines
6.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Marvell RVU Admin Function driver
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*
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* Copyright (C) 2021 Marvell.
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*
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*/
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#include <linux/bitfield.h>
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#include "rvu.h"
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static int rvu_switch_install_rx_rule(struct rvu *rvu, u16 pcifunc,
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u16 chan_mask)
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{
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struct npc_install_flow_req req = { 0 };
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struct npc_install_flow_rsp rsp = { 0 };
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struct rvu_pfvf *pfvf;
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pfvf = rvu_get_pfvf(rvu, pcifunc);
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/* If the pcifunc is not initialized then nothing to do.
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* This same function will be called again via rvu_switch_update_rules
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* after pcifunc is initialized.
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*/
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if (!test_bit(NIXLF_INITIALIZED, &pfvf->flags))
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return 0;
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ether_addr_copy(req.packet.dmac, pfvf->mac_addr);
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eth_broadcast_addr((u8 *)&req.mask.dmac);
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req.hdr.pcifunc = 0; /* AF is requester */
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req.vf = pcifunc;
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req.features = BIT_ULL(NPC_DMAC);
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req.channel = pfvf->rx_chan_base;
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req.chan_mask = chan_mask;
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req.intf = pfvf->nix_rx_intf;
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req.op = NIX_RX_ACTION_DEFAULT;
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req.default_rule = 1;
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return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
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}
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static int rvu_switch_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry)
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{
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struct npc_install_flow_req req = { 0 };
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struct npc_install_flow_rsp rsp = { 0 };
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struct rvu_pfvf *pfvf;
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u8 lbkid;
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pfvf = rvu_get_pfvf(rvu, pcifunc);
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/* If the pcifunc is not initialized then nothing to do.
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* This same function will be called again via rvu_switch_update_rules
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* after pcifunc is initialized.
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*/
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if (!test_bit(NIXLF_INITIALIZED, &pfvf->flags))
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return 0;
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lbkid = pfvf->nix_blkaddr == BLKADDR_NIX0 ? 0 : 1;
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ether_addr_copy(req.packet.dmac, pfvf->mac_addr);
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eth_broadcast_addr((u8 *)&req.mask.dmac);
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req.hdr.pcifunc = 0; /* AF is requester */
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req.vf = pcifunc;
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req.entry = entry;
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req.features = BIT_ULL(NPC_DMAC);
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req.intf = pfvf->nix_tx_intf;
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req.op = NIX_TX_ACTIONOP_UCAST_CHAN;
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req.index = (lbkid << 8) | RVU_SWITCH_LBK_CHAN;
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req.set_cntr = 1;
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return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
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}
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static int rvu_switch_install_rules(struct rvu *rvu)
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{
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struct rvu_switch *rswitch = &rvu->rswitch;
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u16 start = rswitch->start_entry;
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struct rvu_hwinfo *hw = rvu->hw;
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u16 pcifunc, entry = 0;
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int pf, vf, numvfs;
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int err;
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for (pf = 1; pf < hw->total_pfs; pf++) {
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if (!is_pf_cgxmapped(rvu, pf))
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continue;
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pcifunc = pf << 10;
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/* rvu_get_nix_blkaddr sets up the corresponding NIX block
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* address and NIX RX and TX interfaces for a pcifunc.
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* Generally it is called during attach call of a pcifunc but it
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* is called here since we are pre-installing rules before
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* nixlfs are attached
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*/
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rvu_get_nix_blkaddr(rvu, pcifunc);
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/* MCAM RX rule for a PF/VF already exists as default unicast
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* rules installed by AF. Hence change the channel in those
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* rules to ignore channel so that packets with the required
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* DMAC received from LBK(by other PF/VFs in system) or from
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* external world (from wire) are accepted.
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*/
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err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
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if (err) {
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dev_err(rvu->dev, "RX rule for PF%d failed(%d)\n",
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pf, err);
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return err;
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}
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err = rvu_switch_install_tx_rule(rvu, pcifunc, start + entry);
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if (err) {
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dev_err(rvu->dev, "TX rule for PF%d failed(%d)\n",
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pf, err);
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return err;
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}
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rswitch->entry2pcifunc[entry++] = pcifunc;
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rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);
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for (vf = 0; vf < numvfs; vf++) {
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pcifunc = pf << 10 | ((vf + 1) & 0x3FF);
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rvu_get_nix_blkaddr(rvu, pcifunc);
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err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
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if (err) {
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dev_err(rvu->dev,
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"RX rule for PF%dVF%d failed(%d)\n",
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pf, vf, err);
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return err;
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}
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err = rvu_switch_install_tx_rule(rvu, pcifunc,
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start + entry);
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if (err) {
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dev_err(rvu->dev,
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"TX rule for PF%dVF%d failed(%d)\n",
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pf, vf, err);
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return err;
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}
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rswitch->entry2pcifunc[entry++] = pcifunc;
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}
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}
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return 0;
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}
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void rvu_switch_enable(struct rvu *rvu)
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{
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struct npc_mcam_alloc_entry_req alloc_req = { 0 };
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struct npc_mcam_alloc_entry_rsp alloc_rsp = { 0 };
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struct npc_delete_flow_req uninstall_req = { 0 };
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struct npc_mcam_free_entry_req free_req = { 0 };
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struct rvu_switch *rswitch = &rvu->rswitch;
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struct msg_rsp rsp;
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int ret;
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alloc_req.contig = true;
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alloc_req.count = rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs;
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ret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &alloc_req,
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&alloc_rsp);
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if (ret) {
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dev_err(rvu->dev,
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"Unable to allocate MCAM entries\n");
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goto exit;
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}
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if (alloc_rsp.count != alloc_req.count) {
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dev_err(rvu->dev,
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"Unable to allocate %d MCAM entries, got %d\n",
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alloc_req.count, alloc_rsp.count);
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goto free_entries;
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}
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rswitch->entry2pcifunc = kcalloc(alloc_req.count, sizeof(u16),
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GFP_KERNEL);
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if (!rswitch->entry2pcifunc)
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goto free_entries;
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rswitch->used_entries = alloc_rsp.count;
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rswitch->start_entry = alloc_rsp.entry;
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ret = rvu_switch_install_rules(rvu);
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if (ret)
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goto uninstall_rules;
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return;
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uninstall_rules:
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uninstall_req.start = rswitch->start_entry;
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uninstall_req.end = rswitch->start_entry + rswitch->used_entries - 1;
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rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &rsp);
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kfree(rswitch->entry2pcifunc);
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free_entries:
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free_req.all = 1;
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rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);
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exit:
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return;
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}
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void rvu_switch_disable(struct rvu *rvu)
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{
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struct npc_delete_flow_req uninstall_req = { 0 };
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struct npc_mcam_free_entry_req free_req = { 0 };
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struct rvu_switch *rswitch = &rvu->rswitch;
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struct rvu_hwinfo *hw = rvu->hw;
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int pf, vf, numvfs;
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struct msg_rsp rsp;
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u16 pcifunc;
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int err;
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if (!rswitch->used_entries)
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return;
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for (pf = 1; pf < hw->total_pfs; pf++) {
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if (!is_pf_cgxmapped(rvu, pf))
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continue;
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pcifunc = pf << 10;
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err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);
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if (err)
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dev_err(rvu->dev,
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"Reverting RX rule for PF%d failed(%d)\n",
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pf, err);
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rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);
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for (vf = 0; vf < numvfs; vf++) {
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pcifunc = pf << 10 | ((vf + 1) & 0x3FF);
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err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);
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if (err)
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dev_err(rvu->dev,
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"Reverting RX rule for PF%dVF%d failed(%d)\n",
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pf, vf, err);
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}
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}
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uninstall_req.start = rswitch->start_entry;
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uninstall_req.end = rswitch->start_entry + rswitch->used_entries - 1;
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free_req.all = 1;
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rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &rsp);
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rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);
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rswitch->used_entries = 0;
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kfree(rswitch->entry2pcifunc);
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}
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void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc)
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{
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struct rvu_switch *rswitch = &rvu->rswitch;
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u32 max = rswitch->used_entries;
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u16 entry;
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if (!rswitch->used_entries)
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return;
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for (entry = 0; entry < max; entry++) {
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if (rswitch->entry2pcifunc[entry] == pcifunc)
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break;
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}
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if (entry >= max)
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return;
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rvu_switch_install_tx_rule(rvu, pcifunc, rswitch->start_entry + entry);
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rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
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}
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