407 lines
10 KiB
C
407 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2017 Free Electrons
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*
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* Authors:
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* Boris Brezillon <boris.brezillon@free-electrons.com>
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* Peter Pan <peterpandong@micron.com>
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*/
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#define pr_fmt(fmt) "nand: " fmt
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#include <linux/module.h>
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#include <linux/mtd/nand.h>
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/**
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* nanddev_isbad() - Check if a block is bad
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* @nand: NAND device
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* @pos: position pointing to the block we want to check
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*
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* Return: true if the block is bad, false otherwise.
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*/
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bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos)
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{
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if (mtd_check_expert_analysis_mode())
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return false;
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if (nanddev_bbt_is_initialized(nand)) {
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unsigned int entry;
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int status;
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entry = nanddev_bbt_pos_to_entry(nand, pos);
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status = nanddev_bbt_get_block_status(nand, entry);
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/* Lazy block status retrieval */
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if (status == NAND_BBT_BLOCK_STATUS_UNKNOWN) {
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if (nand->ops->isbad(nand, pos))
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status = NAND_BBT_BLOCK_FACTORY_BAD;
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else
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status = NAND_BBT_BLOCK_GOOD;
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nanddev_bbt_set_block_status(nand, entry, status);
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}
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if (status == NAND_BBT_BLOCK_WORN ||
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status == NAND_BBT_BLOCK_FACTORY_BAD)
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return true;
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return false;
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}
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return nand->ops->isbad(nand, pos);
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}
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EXPORT_SYMBOL_GPL(nanddev_isbad);
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/**
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* nanddev_markbad() - Mark a block as bad
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* @nand: NAND device
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* @pos: position of the block to mark bad
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*
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* Mark a block bad. This function is updating the BBT if available and
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* calls the low-level markbad hook (nand->ops->markbad()).
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*
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* Return: 0 in case of success, a negative error code otherwise.
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*/
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int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos)
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{
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struct mtd_info *mtd = nanddev_to_mtd(nand);
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unsigned int entry;
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int ret = 0;
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if (nanddev_isbad(nand, pos))
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return 0;
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ret = nand->ops->markbad(nand, pos);
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if (ret)
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pr_warn("failed to write BBM to block @%llx (err = %d)\n",
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nanddev_pos_to_offs(nand, pos), ret);
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if (!nanddev_bbt_is_initialized(nand))
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goto out;
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entry = nanddev_bbt_pos_to_entry(nand, pos);
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ret = nanddev_bbt_set_block_status(nand, entry, NAND_BBT_BLOCK_WORN);
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if (ret)
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goto out;
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ret = nanddev_bbt_update(nand);
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out:
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if (!ret)
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mtd->ecc_stats.badblocks++;
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return ret;
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}
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EXPORT_SYMBOL_GPL(nanddev_markbad);
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/**
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* nanddev_isreserved() - Check whether an eraseblock is reserved or not
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* @nand: NAND device
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* @pos: NAND position to test
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*
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* Checks whether the eraseblock pointed by @pos is reserved or not.
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*
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* Return: true if the eraseblock is reserved, false otherwise.
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*/
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bool nanddev_isreserved(struct nand_device *nand, const struct nand_pos *pos)
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{
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unsigned int entry;
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int status;
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if (!nanddev_bbt_is_initialized(nand))
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return false;
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/* Return info from the table */
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entry = nanddev_bbt_pos_to_entry(nand, pos);
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status = nanddev_bbt_get_block_status(nand, entry);
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return status == NAND_BBT_BLOCK_RESERVED;
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}
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EXPORT_SYMBOL_GPL(nanddev_isreserved);
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/**
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* nanddev_erase() - Erase a NAND portion
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* @nand: NAND device
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* @pos: position of the block to erase
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*
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* Erases the block if it's not bad.
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*
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* Return: 0 in case of success, a negative error code otherwise.
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*/
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int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos)
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{
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if (nanddev_isbad(nand, pos) || nanddev_isreserved(nand, pos)) {
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pr_warn("attempt to erase a bad/reserved block @%llx\n",
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nanddev_pos_to_offs(nand, pos));
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return -EIO;
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}
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return nand->ops->erase(nand, pos);
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}
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EXPORT_SYMBOL_GPL(nanddev_erase);
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/**
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* nanddev_mtd_erase() - Generic mtd->_erase() implementation for NAND devices
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* @mtd: MTD device
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* @einfo: erase request
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*
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* This is a simple mtd->_erase() implementation iterating over all blocks
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* concerned by @einfo and calling nand->ops->erase() on each of them.
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*
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* Note that mtd->_erase should not be directly assigned to this helper,
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* because there's no locking here. NAND specialized layers should instead
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* implement there own wrapper around nanddev_mtd_erase() taking the
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* appropriate lock before calling nanddev_mtd_erase().
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*
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* Return: 0 in case of success, a negative error code otherwise.
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*/
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int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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struct nand_pos pos, last;
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int ret;
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nanddev_offs_to_pos(nand, einfo->addr, &pos);
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nanddev_offs_to_pos(nand, einfo->addr + einfo->len - 1, &last);
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while (nanddev_pos_cmp(&pos, &last) <= 0) {
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ret = nanddev_erase(nand, &pos);
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if (ret) {
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einfo->fail_addr = nanddev_pos_to_offs(nand, &pos);
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return ret;
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}
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nanddev_pos_next_eraseblock(nand, &pos);
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(nanddev_mtd_erase);
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/**
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* nanddev_mtd_max_bad_blocks() - Get the maximum number of bad eraseblock on
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* a specific region of the NAND device
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* @mtd: MTD device
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* @offs: offset of the NAND region
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* @len: length of the NAND region
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*
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* Default implementation for mtd->_max_bad_blocks(). Only works if
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* nand->memorg.max_bad_eraseblocks_per_lun is > 0.
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*
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* Return: a positive number encoding the maximum number of eraseblocks on a
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* portion of memory, a negative error code otherwise.
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*/
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int nanddev_mtd_max_bad_blocks(struct mtd_info *mtd, loff_t offs, size_t len)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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struct nand_pos pos, end;
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unsigned int max_bb = 0;
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if (!nand->memorg.max_bad_eraseblocks_per_lun)
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return -ENOTSUPP;
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nanddev_offs_to_pos(nand, offs, &pos);
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nanddev_offs_to_pos(nand, offs + len, &end);
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for (nanddev_offs_to_pos(nand, offs, &pos);
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nanddev_pos_cmp(&pos, &end) < 0;
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nanddev_pos_next_lun(nand, &pos))
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max_bb += nand->memorg.max_bad_eraseblocks_per_lun;
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return max_bb;
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}
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EXPORT_SYMBOL_GPL(nanddev_mtd_max_bad_blocks);
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/**
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* nanddev_get_ecc_engine() - Find and get a suitable ECC engine
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* @nand: NAND device
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*/
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static int nanddev_get_ecc_engine(struct nand_device *nand)
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{
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int engine_type;
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/* Read the user desires in terms of ECC engine/configuration */
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of_get_nand_ecc_user_config(nand);
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engine_type = nand->ecc.user_conf.engine_type;
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if (engine_type == NAND_ECC_ENGINE_TYPE_INVALID)
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engine_type = nand->ecc.defaults.engine_type;
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switch (engine_type) {
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case NAND_ECC_ENGINE_TYPE_NONE:
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return 0;
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case NAND_ECC_ENGINE_TYPE_SOFT:
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nand->ecc.engine = nand_ecc_get_sw_engine(nand);
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break;
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case NAND_ECC_ENGINE_TYPE_ON_DIE:
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nand->ecc.engine = nand_ecc_get_on_die_hw_engine(nand);
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break;
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case NAND_ECC_ENGINE_TYPE_ON_HOST:
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nand->ecc.engine = nand_ecc_get_on_host_hw_engine(nand);
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if (PTR_ERR(nand->ecc.engine) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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break;
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default:
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pr_err("Missing ECC engine type\n");
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}
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if (!nand->ecc.engine)
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return -EINVAL;
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return 0;
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}
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/**
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* nanddev_put_ecc_engine() - Dettach and put the in-use ECC engine
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* @nand: NAND device
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*/
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static int nanddev_put_ecc_engine(struct nand_device *nand)
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{
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switch (nand->ecc.ctx.conf.engine_type) {
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case NAND_ECC_ENGINE_TYPE_ON_HOST:
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nand_ecc_put_on_host_hw_engine(nand);
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break;
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case NAND_ECC_ENGINE_TYPE_NONE:
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case NAND_ECC_ENGINE_TYPE_SOFT:
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case NAND_ECC_ENGINE_TYPE_ON_DIE:
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default:
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break;
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}
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return 0;
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}
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/**
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* nanddev_find_ecc_configuration() - Find a suitable ECC configuration
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* @nand: NAND device
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*/
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static int nanddev_find_ecc_configuration(struct nand_device *nand)
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{
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int ret;
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if (!nand->ecc.engine)
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return -ENOTSUPP;
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ret = nand_ecc_init_ctx(nand);
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if (ret)
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return ret;
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if (!nand_ecc_is_strong_enough(nand))
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pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n",
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nand->mtd.name);
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return 0;
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}
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/**
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* nanddev_ecc_engine_init() - Initialize an ECC engine for the chip
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* @nand: NAND device
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*/
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int nanddev_ecc_engine_init(struct nand_device *nand)
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{
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int ret;
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/* Look for the ECC engine to use */
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ret = nanddev_get_ecc_engine(nand);
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if (ret) {
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if (ret != -EPROBE_DEFER)
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pr_err("No ECC engine found\n");
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return ret;
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}
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/* No ECC engine requested */
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if (!nand->ecc.engine)
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return 0;
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/* Configure the engine: balance user input and chip requirements */
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ret = nanddev_find_ecc_configuration(nand);
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if (ret) {
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pr_err("No suitable ECC configuration\n");
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nanddev_put_ecc_engine(nand);
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(nanddev_ecc_engine_init);
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/**
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* nanddev_ecc_engine_cleanup() - Cleanup ECC engine initializations
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* @nand: NAND device
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*/
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void nanddev_ecc_engine_cleanup(struct nand_device *nand)
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{
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if (nand->ecc.engine)
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nand_ecc_cleanup_ctx(nand);
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nanddev_put_ecc_engine(nand);
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}
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EXPORT_SYMBOL_GPL(nanddev_ecc_engine_cleanup);
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/**
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* nanddev_init() - Initialize a NAND device
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* @nand: NAND device
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* @ops: NAND device operations
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* @owner: NAND device owner
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*
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* Initializes a NAND device object. Consistency checks are done on @ops and
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* @nand->memorg. Also takes care of initializing the BBT.
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*
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* Return: 0 in case of success, a negative error code otherwise.
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*/
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int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
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struct module *owner)
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{
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struct mtd_info *mtd = nanddev_to_mtd(nand);
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struct nand_memory_organization *memorg = nanddev_get_memorg(nand);
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if (!nand || !ops)
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return -EINVAL;
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if (!ops->erase || !ops->markbad || !ops->isbad)
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return -EINVAL;
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if (!memorg->bits_per_cell || !memorg->pagesize ||
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!memorg->pages_per_eraseblock || !memorg->eraseblocks_per_lun ||
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!memorg->planes_per_lun || !memorg->luns_per_target ||
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!memorg->ntargets)
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return -EINVAL;
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nand->rowconv.eraseblock_addr_shift =
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fls(memorg->pages_per_eraseblock - 1);
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nand->rowconv.lun_addr_shift = fls(memorg->eraseblocks_per_lun - 1) +
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nand->rowconv.eraseblock_addr_shift;
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nand->ops = ops;
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mtd->type = memorg->bits_per_cell == 1 ?
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MTD_NANDFLASH : MTD_MLCNANDFLASH;
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mtd->flags = MTD_CAP_NANDFLASH;
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mtd->erasesize = memorg->pagesize * memorg->pages_per_eraseblock;
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mtd->writesize = memorg->pagesize;
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mtd->writebufsize = memorg->pagesize;
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mtd->oobsize = memorg->oobsize;
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mtd->size = nanddev_size(nand);
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mtd->owner = owner;
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return nanddev_bbt_init(nand);
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}
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EXPORT_SYMBOL_GPL(nanddev_init);
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/**
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* nanddev_cleanup() - Release resources allocated in nanddev_init()
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* @nand: NAND device
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*
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* Basically undoes what has been done in nanddev_init().
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*/
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void nanddev_cleanup(struct nand_device *nand)
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{
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if (nanddev_bbt_is_initialized(nand))
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nanddev_bbt_cleanup(nand);
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}
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EXPORT_SYMBOL_GPL(nanddev_cleanup);
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MODULE_DESCRIPTION("Generic NAND framework");
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MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
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MODULE_LICENSE("GPL v2");
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