1074 lines
28 KiB
C
1074 lines
28 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "nouveau_svm.h"
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#include "nouveau_drv.h"
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#include "nouveau_chan.h"
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#include "nouveau_dmem.h"
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#include <nvif/notify.h>
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#include <nvif/object.h>
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#include <nvif/vmm.h>
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#include <nvif/class.h>
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#include <nvif/clb069.h>
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#include <nvif/ifc00d.h>
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#include <linux/sched/mm.h>
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#include <linux/sort.h>
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#include <linux/hmm.h>
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#include <linux/memremap.h>
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#include <linux/rmap.h>
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struct nouveau_svm {
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struct nouveau_drm *drm;
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struct mutex mutex;
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struct list_head inst;
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struct nouveau_svm_fault_buffer {
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int id;
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struct nvif_object object;
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u32 entries;
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u32 getaddr;
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u32 putaddr;
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u32 get;
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u32 put;
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struct nvif_notify notify;
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struct nouveau_svm_fault {
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u64 inst;
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u64 addr;
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u64 time;
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u32 engine;
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u8 gpc;
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u8 hub;
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u8 access;
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u8 client;
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u8 fault;
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struct nouveau_svmm *svmm;
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} **fault;
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int fault_nr;
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} buffer[1];
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};
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#define FAULT_ACCESS_READ 0
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#define FAULT_ACCESS_WRITE 1
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#define FAULT_ACCESS_ATOMIC 2
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#define FAULT_ACCESS_PREFETCH 3
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#define SVM_DBG(s,f,a...) NV_DEBUG((s)->drm, "svm: "f"\n", ##a)
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#define SVM_ERR(s,f,a...) NV_WARN((s)->drm, "svm: "f"\n", ##a)
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struct nouveau_pfnmap_args {
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struct nvif_ioctl_v0 i;
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struct nvif_ioctl_mthd_v0 m;
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struct nvif_vmm_pfnmap_v0 p;
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};
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struct nouveau_ivmm {
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struct nouveau_svmm *svmm;
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u64 inst;
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struct list_head head;
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};
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static struct nouveau_ivmm *
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nouveau_ivmm_find(struct nouveau_svm *svm, u64 inst)
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{
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struct nouveau_ivmm *ivmm;
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list_for_each_entry(ivmm, &svm->inst, head) {
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if (ivmm->inst == inst)
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return ivmm;
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}
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return NULL;
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}
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#define SVMM_DBG(s,f,a...) \
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NV_DEBUG((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a)
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#define SVMM_ERR(s,f,a...) \
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NV_WARN((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a)
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int
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nouveau_svmm_bind(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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struct nouveau_cli *cli = nouveau_cli(file_priv);
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struct drm_nouveau_svm_bind *args = data;
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unsigned target, cmd, priority;
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unsigned long addr, end;
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struct mm_struct *mm;
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args->va_start &= PAGE_MASK;
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args->va_end = ALIGN(args->va_end, PAGE_SIZE);
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/* Sanity check arguments */
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if (args->reserved0 || args->reserved1)
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return -EINVAL;
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if (args->header & (~NOUVEAU_SVM_BIND_VALID_MASK))
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return -EINVAL;
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if (args->va_start >= args->va_end)
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return -EINVAL;
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cmd = args->header >> NOUVEAU_SVM_BIND_COMMAND_SHIFT;
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cmd &= NOUVEAU_SVM_BIND_COMMAND_MASK;
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switch (cmd) {
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case NOUVEAU_SVM_BIND_COMMAND__MIGRATE:
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break;
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default:
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return -EINVAL;
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}
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priority = args->header >> NOUVEAU_SVM_BIND_PRIORITY_SHIFT;
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priority &= NOUVEAU_SVM_BIND_PRIORITY_MASK;
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/* FIXME support CPU target ie all target value < GPU_VRAM */
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target = args->header >> NOUVEAU_SVM_BIND_TARGET_SHIFT;
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target &= NOUVEAU_SVM_BIND_TARGET_MASK;
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switch (target) {
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case NOUVEAU_SVM_BIND_TARGET__GPU_VRAM:
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break;
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default:
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return -EINVAL;
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}
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/*
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* FIXME: For now refuse non 0 stride, we need to change the migrate
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* kernel function to handle stride to avoid to create a mess within
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* each device driver.
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*/
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if (args->stride)
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return -EINVAL;
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/*
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* Ok we are ask to do something sane, for now we only support migrate
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* commands but we will add things like memory policy (what to do on
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* page fault) and maybe some other commands.
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*/
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mm = get_task_mm(current);
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if (!mm) {
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return -EINVAL;
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}
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mmap_read_lock(mm);
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if (!cli->svm.svmm) {
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mmap_read_unlock(mm);
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mmput(mm);
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return -EINVAL;
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}
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for (addr = args->va_start, end = args->va_end; addr < end;) {
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struct vm_area_struct *vma;
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unsigned long next;
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vma = find_vma_intersection(mm, addr, end);
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if (!vma)
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break;
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addr = max(addr, vma->vm_start);
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next = min(vma->vm_end, end);
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/* This is a best effort so we ignore errors */
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nouveau_dmem_migrate_vma(cli->drm, cli->svm.svmm, vma, addr,
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next);
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addr = next;
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}
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/*
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* FIXME Return the number of page we have migrated, again we need to
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* update the migrate API to return that information so that we can
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* report it to user space.
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*/
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args->result = 0;
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mmap_read_unlock(mm);
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mmput(mm);
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return 0;
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}
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/* Unlink channel instance from SVMM. */
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void
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nouveau_svmm_part(struct nouveau_svmm *svmm, u64 inst)
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{
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struct nouveau_ivmm *ivmm;
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if (svmm) {
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mutex_lock(&svmm->vmm->cli->drm->svm->mutex);
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ivmm = nouveau_ivmm_find(svmm->vmm->cli->drm->svm, inst);
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if (ivmm) {
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list_del(&ivmm->head);
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kfree(ivmm);
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}
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mutex_unlock(&svmm->vmm->cli->drm->svm->mutex);
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}
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}
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/* Link channel instance to SVMM. */
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int
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nouveau_svmm_join(struct nouveau_svmm *svmm, u64 inst)
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{
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struct nouveau_ivmm *ivmm;
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if (svmm) {
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if (!(ivmm = kmalloc(sizeof(*ivmm), GFP_KERNEL)))
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return -ENOMEM;
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ivmm->svmm = svmm;
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ivmm->inst = inst;
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mutex_lock(&svmm->vmm->cli->drm->svm->mutex);
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list_add(&ivmm->head, &svmm->vmm->cli->drm->svm->inst);
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mutex_unlock(&svmm->vmm->cli->drm->svm->mutex);
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}
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return 0;
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}
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/* Invalidate SVMM address-range on GPU. */
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void
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nouveau_svmm_invalidate(struct nouveau_svmm *svmm, u64 start, u64 limit)
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{
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if (limit > start) {
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nvif_object_mthd(&svmm->vmm->vmm.object, NVIF_VMM_V0_PFNCLR,
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&(struct nvif_vmm_pfnclr_v0) {
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.addr = start,
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.size = limit - start,
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}, sizeof(struct nvif_vmm_pfnclr_v0));
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}
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}
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static int
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nouveau_svmm_invalidate_range_start(struct mmu_notifier *mn,
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const struct mmu_notifier_range *update)
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{
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struct nouveau_svmm *svmm =
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container_of(mn, struct nouveau_svmm, notifier);
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unsigned long start = update->start;
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unsigned long limit = update->end;
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if (!mmu_notifier_range_blockable(update))
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return -EAGAIN;
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SVMM_DBG(svmm, "invalidate %016lx-%016lx", start, limit);
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mutex_lock(&svmm->mutex);
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if (unlikely(!svmm->vmm))
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goto out;
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/*
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* Ignore invalidation callbacks for device private pages since
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* the invalidation is handled as part of the migration process.
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*/
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if (update->event == MMU_NOTIFY_MIGRATE &&
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update->owner == svmm->vmm->cli->drm->dev)
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goto out;
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if (limit > svmm->unmanaged.start && start < svmm->unmanaged.limit) {
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if (start < svmm->unmanaged.start) {
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nouveau_svmm_invalidate(svmm, start,
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svmm->unmanaged.limit);
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}
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start = svmm->unmanaged.limit;
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}
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nouveau_svmm_invalidate(svmm, start, limit);
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out:
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mutex_unlock(&svmm->mutex);
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return 0;
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}
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static void nouveau_svmm_free_notifier(struct mmu_notifier *mn)
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{
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kfree(container_of(mn, struct nouveau_svmm, notifier));
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}
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static const struct mmu_notifier_ops nouveau_mn_ops = {
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.invalidate_range_start = nouveau_svmm_invalidate_range_start,
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.free_notifier = nouveau_svmm_free_notifier,
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};
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void
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nouveau_svmm_fini(struct nouveau_svmm **psvmm)
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{
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struct nouveau_svmm *svmm = *psvmm;
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if (svmm) {
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mutex_lock(&svmm->mutex);
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svmm->vmm = NULL;
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mutex_unlock(&svmm->mutex);
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mmu_notifier_put(&svmm->notifier);
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*psvmm = NULL;
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}
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}
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int
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nouveau_svmm_init(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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struct nouveau_cli *cli = nouveau_cli(file_priv);
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struct nouveau_svmm *svmm;
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struct drm_nouveau_svm_init *args = data;
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int ret;
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/* We need to fail if svm is disabled */
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if (!cli->drm->svm)
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return -ENOSYS;
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/* Allocate tracking for SVM-enabled VMM. */
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if (!(svmm = kzalloc(sizeof(*svmm), GFP_KERNEL)))
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return -ENOMEM;
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svmm->vmm = &cli->svm;
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svmm->unmanaged.start = args->unmanaged_addr;
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svmm->unmanaged.limit = args->unmanaged_addr + args->unmanaged_size;
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mutex_init(&svmm->mutex);
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/* Check that SVM isn't already enabled for the client. */
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mutex_lock(&cli->mutex);
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if (cli->svm.cli) {
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ret = -EBUSY;
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goto out_free;
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}
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/* Allocate a new GPU VMM that can support SVM (managed by the
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* client, with replayable faults enabled).
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*
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* All future channel/memory allocations will make use of this
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* VMM instead of the standard one.
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*/
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ret = nvif_vmm_ctor(&cli->mmu, "svmVmm",
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cli->vmm.vmm.object.oclass, true,
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args->unmanaged_addr, args->unmanaged_size,
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&(struct gp100_vmm_v0) {
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.fault_replay = true,
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}, sizeof(struct gp100_vmm_v0), &cli->svm.vmm);
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if (ret)
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goto out_free;
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mmap_write_lock(current->mm);
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svmm->notifier.ops = &nouveau_mn_ops;
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ret = __mmu_notifier_register(&svmm->notifier, current->mm);
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if (ret)
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goto out_mm_unlock;
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/* Note, ownership of svmm transfers to mmu_notifier */
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cli->svm.svmm = svmm;
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cli->svm.cli = cli;
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mmap_write_unlock(current->mm);
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mutex_unlock(&cli->mutex);
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return 0;
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out_mm_unlock:
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mmap_write_unlock(current->mm);
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out_free:
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mutex_unlock(&cli->mutex);
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kfree(svmm);
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return ret;
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}
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/* Issue fault replay for GPU to retry accesses that faulted previously. */
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static void
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nouveau_svm_fault_replay(struct nouveau_svm *svm)
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{
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SVM_DBG(svm, "replay");
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WARN_ON(nvif_object_mthd(&svm->drm->client.vmm.vmm.object,
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GP100_VMM_VN_FAULT_REPLAY,
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&(struct gp100_vmm_fault_replay_vn) {},
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sizeof(struct gp100_vmm_fault_replay_vn)));
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}
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/* Cancel a replayable fault that could not be handled.
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*
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* Cancelling the fault will trigger recovery to reset the engine
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* and kill the offending channel (ie. GPU SIGSEGV).
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*/
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static void
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nouveau_svm_fault_cancel(struct nouveau_svm *svm,
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u64 inst, u8 hub, u8 gpc, u8 client)
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{
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SVM_DBG(svm, "cancel %016llx %d %02x %02x", inst, hub, gpc, client);
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WARN_ON(nvif_object_mthd(&svm->drm->client.vmm.vmm.object,
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GP100_VMM_VN_FAULT_CANCEL,
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&(struct gp100_vmm_fault_cancel_v0) {
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.hub = hub,
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.gpc = gpc,
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.client = client,
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.inst = inst,
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}, sizeof(struct gp100_vmm_fault_cancel_v0)));
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}
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static void
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nouveau_svm_fault_cancel_fault(struct nouveau_svm *svm,
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struct nouveau_svm_fault *fault)
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{
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nouveau_svm_fault_cancel(svm, fault->inst,
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fault->hub,
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fault->gpc,
|
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fault->client);
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}
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|
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static int
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nouveau_svm_fault_priority(u8 fault)
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{
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switch (fault) {
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case FAULT_ACCESS_PREFETCH:
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return 0;
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case FAULT_ACCESS_READ:
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return 1;
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case FAULT_ACCESS_WRITE:
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return 2;
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case FAULT_ACCESS_ATOMIC:
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return 3;
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default:
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WARN_ON_ONCE(1);
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return -1;
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}
|
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}
|
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|
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static int
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nouveau_svm_fault_cmp(const void *a, const void *b)
|
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{
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const struct nouveau_svm_fault *fa = *(struct nouveau_svm_fault **)a;
|
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const struct nouveau_svm_fault *fb = *(struct nouveau_svm_fault **)b;
|
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int ret;
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if ((ret = (s64)fa->inst - fb->inst))
|
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return ret;
|
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if ((ret = (s64)fa->addr - fb->addr))
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return ret;
|
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return nouveau_svm_fault_priority(fa->access) -
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nouveau_svm_fault_priority(fb->access);
|
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}
|
|
|
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static void
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nouveau_svm_fault_cache(struct nouveau_svm *svm,
|
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struct nouveau_svm_fault_buffer *buffer, u32 offset)
|
|
{
|
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struct nvif_object *memory = &buffer->object;
|
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const u32 instlo = nvif_rd32(memory, offset + 0x00);
|
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const u32 insthi = nvif_rd32(memory, offset + 0x04);
|
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const u32 addrlo = nvif_rd32(memory, offset + 0x08);
|
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const u32 addrhi = nvif_rd32(memory, offset + 0x0c);
|
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const u32 timelo = nvif_rd32(memory, offset + 0x10);
|
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const u32 timehi = nvif_rd32(memory, offset + 0x14);
|
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const u32 engine = nvif_rd32(memory, offset + 0x18);
|
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const u32 info = nvif_rd32(memory, offset + 0x1c);
|
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const u64 inst = (u64)insthi << 32 | instlo;
|
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const u8 gpc = (info & 0x1f000000) >> 24;
|
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const u8 hub = (info & 0x00100000) >> 20;
|
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const u8 client = (info & 0x00007f00) >> 8;
|
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struct nouveau_svm_fault *fault;
|
|
|
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//XXX: i think we're supposed to spin waiting */
|
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if (WARN_ON(!(info & 0x80000000)))
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return;
|
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|
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nvif_mask(memory, offset + 0x1c, 0x80000000, 0x00000000);
|
|
|
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if (!buffer->fault[buffer->fault_nr]) {
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fault = kmalloc(sizeof(*fault), GFP_KERNEL);
|
|
if (WARN_ON(!fault)) {
|
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nouveau_svm_fault_cancel(svm, inst, hub, gpc, client);
|
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return;
|
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}
|
|
buffer->fault[buffer->fault_nr] = fault;
|
|
}
|
|
|
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fault = buffer->fault[buffer->fault_nr++];
|
|
fault->inst = inst;
|
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fault->addr = (u64)addrhi << 32 | addrlo;
|
|
fault->time = (u64)timehi << 32 | timelo;
|
|
fault->engine = engine;
|
|
fault->gpc = gpc;
|
|
fault->hub = hub;
|
|
fault->access = (info & 0x000f0000) >> 16;
|
|
fault->client = client;
|
|
fault->fault = (info & 0x0000001f);
|
|
|
|
SVM_DBG(svm, "fault %016llx %016llx %02x",
|
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fault->inst, fault->addr, fault->access);
|
|
}
|
|
|
|
struct svm_notifier {
|
|
struct mmu_interval_notifier notifier;
|
|
struct nouveau_svmm *svmm;
|
|
};
|
|
|
|
static bool nouveau_svm_range_invalidate(struct mmu_interval_notifier *mni,
|
|
const struct mmu_notifier_range *range,
|
|
unsigned long cur_seq)
|
|
{
|
|
struct svm_notifier *sn =
|
|
container_of(mni, struct svm_notifier, notifier);
|
|
|
|
if (range->event == MMU_NOTIFY_EXCLUSIVE &&
|
|
range->owner == sn->svmm->vmm->cli->drm->dev)
|
|
return true;
|
|
|
|
/*
|
|
* serializes the update to mni->invalidate_seq done by caller and
|
|
* prevents invalidation of the PTE from progressing while HW is being
|
|
* programmed. This is very hacky and only works because the normal
|
|
* notifier that does invalidation is always called after the range
|
|
* notifier.
|
|
*/
|
|
if (mmu_notifier_range_blockable(range))
|
|
mutex_lock(&sn->svmm->mutex);
|
|
else if (!mutex_trylock(&sn->svmm->mutex))
|
|
return false;
|
|
mmu_interval_set_seq(mni, cur_seq);
|
|
mutex_unlock(&sn->svmm->mutex);
|
|
return true;
|
|
}
|
|
|
|
static const struct mmu_interval_notifier_ops nouveau_svm_mni_ops = {
|
|
.invalidate = nouveau_svm_range_invalidate,
|
|
};
|
|
|
|
static void nouveau_hmm_convert_pfn(struct nouveau_drm *drm,
|
|
struct hmm_range *range,
|
|
struct nouveau_pfnmap_args *args)
|
|
{
|
|
struct page *page;
|
|
|
|
/*
|
|
* The address prepared here is passed through nvif_object_ioctl()
|
|
* to an eventual DMA map in something like gp100_vmm_pgt_pfn()
|
|
*
|
|
* This is all just encoding the internal hmm representation into a
|
|
* different nouveau internal representation.
|
|
*/
|
|
if (!(range->hmm_pfns[0] & HMM_PFN_VALID)) {
|
|
args->p.phys[0] = 0;
|
|
return;
|
|
}
|
|
|
|
page = hmm_pfn_to_page(range->hmm_pfns[0]);
|
|
/*
|
|
* Only map compound pages to the GPU if the CPU is also mapping the
|
|
* page as a compound page. Otherwise, the PTE protections might not be
|
|
* consistent (e.g., CPU only maps part of a compound page).
|
|
* Note that the underlying page might still be larger than the
|
|
* CPU mapping (e.g., a PUD sized compound page partially mapped with
|
|
* a PMD sized page table entry).
|
|
*/
|
|
if (hmm_pfn_to_map_order(range->hmm_pfns[0])) {
|
|
unsigned long addr = args->p.addr;
|
|
|
|
args->p.page = hmm_pfn_to_map_order(range->hmm_pfns[0]) +
|
|
PAGE_SHIFT;
|
|
args->p.size = 1UL << args->p.page;
|
|
args->p.addr &= ~(args->p.size - 1);
|
|
page -= (addr - args->p.addr) >> PAGE_SHIFT;
|
|
}
|
|
if (is_device_private_page(page))
|
|
args->p.phys[0] = nouveau_dmem_page_addr(page) |
|
|
NVIF_VMM_PFNMAP_V0_V |
|
|
NVIF_VMM_PFNMAP_V0_VRAM;
|
|
else
|
|
args->p.phys[0] = page_to_phys(page) |
|
|
NVIF_VMM_PFNMAP_V0_V |
|
|
NVIF_VMM_PFNMAP_V0_HOST;
|
|
if (range->hmm_pfns[0] & HMM_PFN_WRITE)
|
|
args->p.phys[0] |= NVIF_VMM_PFNMAP_V0_W;
|
|
}
|
|
|
|
static int nouveau_atomic_range_fault(struct nouveau_svmm *svmm,
|
|
struct nouveau_drm *drm,
|
|
struct nouveau_pfnmap_args *args, u32 size,
|
|
struct svm_notifier *notifier)
|
|
{
|
|
unsigned long timeout =
|
|
jiffies + msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT);
|
|
struct mm_struct *mm = svmm->notifier.mm;
|
|
struct page *page;
|
|
unsigned long start = args->p.addr;
|
|
unsigned long notifier_seq;
|
|
int ret = 0;
|
|
|
|
ret = mmu_interval_notifier_insert(¬ifier->notifier, mm,
|
|
args->p.addr, args->p.size,
|
|
&nouveau_svm_mni_ops);
|
|
if (ret)
|
|
return ret;
|
|
|
|
while (true) {
|
|
if (time_after(jiffies, timeout)) {
|
|
ret = -EBUSY;
|
|
goto out;
|
|
}
|
|
|
|
notifier_seq = mmu_interval_read_begin(¬ifier->notifier);
|
|
mmap_read_lock(mm);
|
|
ret = make_device_exclusive_range(mm, start, start + PAGE_SIZE,
|
|
&page, drm->dev);
|
|
mmap_read_unlock(mm);
|
|
if (ret <= 0 || !page) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
mutex_lock(&svmm->mutex);
|
|
if (!mmu_interval_read_retry(¬ifier->notifier,
|
|
notifier_seq))
|
|
break;
|
|
mutex_unlock(&svmm->mutex);
|
|
}
|
|
|
|
/* Map the page on the GPU. */
|
|
args->p.page = 12;
|
|
args->p.size = PAGE_SIZE;
|
|
args->p.addr = start;
|
|
args->p.phys[0] = page_to_phys(page) |
|
|
NVIF_VMM_PFNMAP_V0_V |
|
|
NVIF_VMM_PFNMAP_V0_W |
|
|
NVIF_VMM_PFNMAP_V0_A |
|
|
NVIF_VMM_PFNMAP_V0_HOST;
|
|
|
|
ret = nvif_object_ioctl(&svmm->vmm->vmm.object, args, size, NULL);
|
|
mutex_unlock(&svmm->mutex);
|
|
|
|
unlock_page(page);
|
|
put_page(page);
|
|
|
|
out:
|
|
mmu_interval_notifier_remove(¬ifier->notifier);
|
|
return ret;
|
|
}
|
|
|
|
static int nouveau_range_fault(struct nouveau_svmm *svmm,
|
|
struct nouveau_drm *drm,
|
|
struct nouveau_pfnmap_args *args, u32 size,
|
|
unsigned long hmm_flags,
|
|
struct svm_notifier *notifier)
|
|
{
|
|
unsigned long timeout =
|
|
jiffies + msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT);
|
|
/* Have HMM fault pages within the fault window to the GPU. */
|
|
unsigned long hmm_pfns[1];
|
|
struct hmm_range range = {
|
|
.notifier = ¬ifier->notifier,
|
|
.default_flags = hmm_flags,
|
|
.hmm_pfns = hmm_pfns,
|
|
.dev_private_owner = drm->dev,
|
|
};
|
|
struct mm_struct *mm = svmm->notifier.mm;
|
|
int ret;
|
|
|
|
ret = mmu_interval_notifier_insert(¬ifier->notifier, mm,
|
|
args->p.addr, args->p.size,
|
|
&nouveau_svm_mni_ops);
|
|
if (ret)
|
|
return ret;
|
|
|
|
range.start = notifier->notifier.interval_tree.start;
|
|
range.end = notifier->notifier.interval_tree.last + 1;
|
|
|
|
while (true) {
|
|
if (time_after(jiffies, timeout)) {
|
|
ret = -EBUSY;
|
|
goto out;
|
|
}
|
|
|
|
range.notifier_seq = mmu_interval_read_begin(range.notifier);
|
|
mmap_read_lock(mm);
|
|
ret = hmm_range_fault(&range);
|
|
mmap_read_unlock(mm);
|
|
if (ret) {
|
|
if (ret == -EBUSY)
|
|
continue;
|
|
goto out;
|
|
}
|
|
|
|
mutex_lock(&svmm->mutex);
|
|
if (mmu_interval_read_retry(range.notifier,
|
|
range.notifier_seq)) {
|
|
mutex_unlock(&svmm->mutex);
|
|
continue;
|
|
}
|
|
break;
|
|
}
|
|
|
|
nouveau_hmm_convert_pfn(drm, &range, args);
|
|
|
|
ret = nvif_object_ioctl(&svmm->vmm->vmm.object, args, size, NULL);
|
|
mutex_unlock(&svmm->mutex);
|
|
|
|
out:
|
|
mmu_interval_notifier_remove(¬ifier->notifier);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nouveau_svm_fault(struct nvif_notify *notify)
|
|
{
|
|
struct nouveau_svm_fault_buffer *buffer =
|
|
container_of(notify, typeof(*buffer), notify);
|
|
struct nouveau_svm *svm =
|
|
container_of(buffer, typeof(*svm), buffer[buffer->id]);
|
|
struct nvif_object *device = &svm->drm->client.device.object;
|
|
struct nouveau_svmm *svmm;
|
|
struct {
|
|
struct nouveau_pfnmap_args i;
|
|
u64 phys[1];
|
|
} args;
|
|
unsigned long hmm_flags;
|
|
u64 inst, start, limit;
|
|
int fi, fn;
|
|
int replay = 0, atomic = 0, ret;
|
|
|
|
/* Parse available fault buffer entries into a cache, and update
|
|
* the GET pointer so HW can reuse the entries.
|
|
*/
|
|
SVM_DBG(svm, "fault handler");
|
|
if (buffer->get == buffer->put) {
|
|
buffer->put = nvif_rd32(device, buffer->putaddr);
|
|
buffer->get = nvif_rd32(device, buffer->getaddr);
|
|
if (buffer->get == buffer->put)
|
|
return NVIF_NOTIFY_KEEP;
|
|
}
|
|
buffer->fault_nr = 0;
|
|
|
|
SVM_DBG(svm, "get %08x put %08x", buffer->get, buffer->put);
|
|
while (buffer->get != buffer->put) {
|
|
nouveau_svm_fault_cache(svm, buffer, buffer->get * 0x20);
|
|
if (++buffer->get == buffer->entries)
|
|
buffer->get = 0;
|
|
}
|
|
nvif_wr32(device, buffer->getaddr, buffer->get);
|
|
SVM_DBG(svm, "%d fault(s) pending", buffer->fault_nr);
|
|
|
|
/* Sort parsed faults by instance pointer to prevent unnecessary
|
|
* instance to SVMM translations, followed by address and access
|
|
* type to reduce the amount of work when handling the faults.
|
|
*/
|
|
sort(buffer->fault, buffer->fault_nr, sizeof(*buffer->fault),
|
|
nouveau_svm_fault_cmp, NULL);
|
|
|
|
/* Lookup SVMM structure for each unique instance pointer. */
|
|
mutex_lock(&svm->mutex);
|
|
for (fi = 0, svmm = NULL; fi < buffer->fault_nr; fi++) {
|
|
if (!svmm || buffer->fault[fi]->inst != inst) {
|
|
struct nouveau_ivmm *ivmm =
|
|
nouveau_ivmm_find(svm, buffer->fault[fi]->inst);
|
|
svmm = ivmm ? ivmm->svmm : NULL;
|
|
inst = buffer->fault[fi]->inst;
|
|
SVM_DBG(svm, "inst %016llx -> svm-%p", inst, svmm);
|
|
}
|
|
buffer->fault[fi]->svmm = svmm;
|
|
}
|
|
mutex_unlock(&svm->mutex);
|
|
|
|
/* Process list of faults. */
|
|
args.i.i.version = 0;
|
|
args.i.i.type = NVIF_IOCTL_V0_MTHD;
|
|
args.i.m.version = 0;
|
|
args.i.m.method = NVIF_VMM_V0_PFNMAP;
|
|
args.i.p.version = 0;
|
|
|
|
for (fi = 0; fn = fi + 1, fi < buffer->fault_nr; fi = fn) {
|
|
struct svm_notifier notifier;
|
|
struct mm_struct *mm;
|
|
|
|
/* Cancel any faults from non-SVM channels. */
|
|
if (!(svmm = buffer->fault[fi]->svmm)) {
|
|
nouveau_svm_fault_cancel_fault(svm, buffer->fault[fi]);
|
|
continue;
|
|
}
|
|
SVMM_DBG(svmm, "addr %016llx", buffer->fault[fi]->addr);
|
|
|
|
/* We try and group handling of faults within a small
|
|
* window into a single update.
|
|
*/
|
|
start = buffer->fault[fi]->addr;
|
|
limit = start + PAGE_SIZE;
|
|
if (start < svmm->unmanaged.limit)
|
|
limit = min_t(u64, limit, svmm->unmanaged.start);
|
|
|
|
/*
|
|
* Prepare the GPU-side update of all pages within the
|
|
* fault window, determining required pages and access
|
|
* permissions based on pending faults.
|
|
*/
|
|
args.i.p.addr = start;
|
|
args.i.p.page = PAGE_SHIFT;
|
|
args.i.p.size = PAGE_SIZE;
|
|
/*
|
|
* Determine required permissions based on GPU fault
|
|
* access flags.
|
|
*/
|
|
switch (buffer->fault[fi]->access) {
|
|
case 0: /* READ. */
|
|
hmm_flags = HMM_PFN_REQ_FAULT;
|
|
break;
|
|
case 2: /* ATOMIC. */
|
|
atomic = true;
|
|
break;
|
|
case 3: /* PREFETCH. */
|
|
hmm_flags = 0;
|
|
break;
|
|
default:
|
|
hmm_flags = HMM_PFN_REQ_FAULT | HMM_PFN_REQ_WRITE;
|
|
break;
|
|
}
|
|
|
|
mm = svmm->notifier.mm;
|
|
if (!mmget_not_zero(mm)) {
|
|
nouveau_svm_fault_cancel_fault(svm, buffer->fault[fi]);
|
|
continue;
|
|
}
|
|
|
|
notifier.svmm = svmm;
|
|
if (atomic)
|
|
ret = nouveau_atomic_range_fault(svmm, svm->drm,
|
|
&args.i, sizeof(args),
|
|
¬ifier);
|
|
else
|
|
ret = nouveau_range_fault(svmm, svm->drm, &args.i,
|
|
sizeof(args), hmm_flags,
|
|
¬ifier);
|
|
mmput(mm);
|
|
|
|
limit = args.i.p.addr + args.i.p.size;
|
|
for (fn = fi; ++fn < buffer->fault_nr; ) {
|
|
/* It's okay to skip over duplicate addresses from the
|
|
* same SVMM as faults are ordered by access type such
|
|
* that only the first one needs to be handled.
|
|
*
|
|
* ie. WRITE faults appear first, thus any handling of
|
|
* pending READ faults will already be satisfied.
|
|
* But if a large page is mapped, make sure subsequent
|
|
* fault addresses have sufficient access permission.
|
|
*/
|
|
if (buffer->fault[fn]->svmm != svmm ||
|
|
buffer->fault[fn]->addr >= limit ||
|
|
(buffer->fault[fi]->access == FAULT_ACCESS_READ &&
|
|
!(args.phys[0] & NVIF_VMM_PFNMAP_V0_V)) ||
|
|
(buffer->fault[fi]->access != FAULT_ACCESS_READ &&
|
|
buffer->fault[fi]->access != FAULT_ACCESS_PREFETCH &&
|
|
!(args.phys[0] & NVIF_VMM_PFNMAP_V0_W)) ||
|
|
(buffer->fault[fi]->access != FAULT_ACCESS_READ &&
|
|
buffer->fault[fi]->access != FAULT_ACCESS_WRITE &&
|
|
buffer->fault[fi]->access != FAULT_ACCESS_PREFETCH &&
|
|
!(args.phys[0] & NVIF_VMM_PFNMAP_V0_A)))
|
|
break;
|
|
}
|
|
|
|
/* If handling failed completely, cancel all faults. */
|
|
if (ret) {
|
|
while (fi < fn) {
|
|
struct nouveau_svm_fault *fault =
|
|
buffer->fault[fi++];
|
|
|
|
nouveau_svm_fault_cancel_fault(svm, fault);
|
|
}
|
|
} else
|
|
replay++;
|
|
}
|
|
|
|
/* Issue fault replay to the GPU. */
|
|
if (replay)
|
|
nouveau_svm_fault_replay(svm);
|
|
return NVIF_NOTIFY_KEEP;
|
|
}
|
|
|
|
static struct nouveau_pfnmap_args *
|
|
nouveau_pfns_to_args(void *pfns)
|
|
{
|
|
return container_of(pfns, struct nouveau_pfnmap_args, p.phys);
|
|
}
|
|
|
|
u64 *
|
|
nouveau_pfns_alloc(unsigned long npages)
|
|
{
|
|
struct nouveau_pfnmap_args *args;
|
|
|
|
args = kzalloc(struct_size(args, p.phys, npages), GFP_KERNEL);
|
|
if (!args)
|
|
return NULL;
|
|
|
|
args->i.type = NVIF_IOCTL_V0_MTHD;
|
|
args->m.method = NVIF_VMM_V0_PFNMAP;
|
|
args->p.page = PAGE_SHIFT;
|
|
|
|
return args->p.phys;
|
|
}
|
|
|
|
void
|
|
nouveau_pfns_free(u64 *pfns)
|
|
{
|
|
struct nouveau_pfnmap_args *args = nouveau_pfns_to_args(pfns);
|
|
|
|
kfree(args);
|
|
}
|
|
|
|
void
|
|
nouveau_pfns_map(struct nouveau_svmm *svmm, struct mm_struct *mm,
|
|
unsigned long addr, u64 *pfns, unsigned long npages)
|
|
{
|
|
struct nouveau_pfnmap_args *args = nouveau_pfns_to_args(pfns);
|
|
int ret;
|
|
|
|
args->p.addr = addr;
|
|
args->p.size = npages << PAGE_SHIFT;
|
|
|
|
mutex_lock(&svmm->mutex);
|
|
|
|
ret = nvif_object_ioctl(&svmm->vmm->vmm.object, args,
|
|
struct_size(args, p.phys, npages), NULL);
|
|
|
|
mutex_unlock(&svmm->mutex);
|
|
}
|
|
|
|
static void
|
|
nouveau_svm_fault_buffer_fini(struct nouveau_svm *svm, int id)
|
|
{
|
|
struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id];
|
|
nvif_notify_put(&buffer->notify);
|
|
}
|
|
|
|
static int
|
|
nouveau_svm_fault_buffer_init(struct nouveau_svm *svm, int id)
|
|
{
|
|
struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id];
|
|
struct nvif_object *device = &svm->drm->client.device.object;
|
|
buffer->get = nvif_rd32(device, buffer->getaddr);
|
|
buffer->put = nvif_rd32(device, buffer->putaddr);
|
|
SVM_DBG(svm, "get %08x put %08x (init)", buffer->get, buffer->put);
|
|
return nvif_notify_get(&buffer->notify);
|
|
}
|
|
|
|
static void
|
|
nouveau_svm_fault_buffer_dtor(struct nouveau_svm *svm, int id)
|
|
{
|
|
struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id];
|
|
int i;
|
|
|
|
if (buffer->fault) {
|
|
for (i = 0; buffer->fault[i] && i < buffer->entries; i++)
|
|
kfree(buffer->fault[i]);
|
|
kvfree(buffer->fault);
|
|
}
|
|
|
|
nouveau_svm_fault_buffer_fini(svm, id);
|
|
|
|
nvif_notify_dtor(&buffer->notify);
|
|
nvif_object_dtor(&buffer->object);
|
|
}
|
|
|
|
static int
|
|
nouveau_svm_fault_buffer_ctor(struct nouveau_svm *svm, s32 oclass, int id)
|
|
{
|
|
struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id];
|
|
struct nouveau_drm *drm = svm->drm;
|
|
struct nvif_object *device = &drm->client.device.object;
|
|
struct nvif_clb069_v0 args = {};
|
|
int ret;
|
|
|
|
buffer->id = id;
|
|
|
|
ret = nvif_object_ctor(device, "svmFaultBuffer", 0, oclass, &args,
|
|
sizeof(args), &buffer->object);
|
|
if (ret < 0) {
|
|
SVM_ERR(svm, "Fault buffer allocation failed: %d", ret);
|
|
return ret;
|
|
}
|
|
|
|
nvif_object_map(&buffer->object, NULL, 0);
|
|
buffer->entries = args.entries;
|
|
buffer->getaddr = args.get;
|
|
buffer->putaddr = args.put;
|
|
|
|
ret = nvif_notify_ctor(&buffer->object, "svmFault", nouveau_svm_fault,
|
|
true, NVB069_V0_NTFY_FAULT, NULL, 0, 0,
|
|
&buffer->notify);
|
|
if (ret)
|
|
return ret;
|
|
|
|
buffer->fault = kvcalloc(sizeof(*buffer->fault), buffer->entries, GFP_KERNEL);
|
|
if (!buffer->fault)
|
|
return -ENOMEM;
|
|
|
|
return nouveau_svm_fault_buffer_init(svm, id);
|
|
}
|
|
|
|
void
|
|
nouveau_svm_resume(struct nouveau_drm *drm)
|
|
{
|
|
struct nouveau_svm *svm = drm->svm;
|
|
if (svm)
|
|
nouveau_svm_fault_buffer_init(svm, 0);
|
|
}
|
|
|
|
void
|
|
nouveau_svm_suspend(struct nouveau_drm *drm)
|
|
{
|
|
struct nouveau_svm *svm = drm->svm;
|
|
if (svm)
|
|
nouveau_svm_fault_buffer_fini(svm, 0);
|
|
}
|
|
|
|
void
|
|
nouveau_svm_fini(struct nouveau_drm *drm)
|
|
{
|
|
struct nouveau_svm *svm = drm->svm;
|
|
if (svm) {
|
|
nouveau_svm_fault_buffer_dtor(svm, 0);
|
|
kfree(drm->svm);
|
|
drm->svm = NULL;
|
|
}
|
|
}
|
|
|
|
void
|
|
nouveau_svm_init(struct nouveau_drm *drm)
|
|
{
|
|
static const struct nvif_mclass buffers[] = {
|
|
{ VOLTA_FAULT_BUFFER_A, 0 },
|
|
{ MAXWELL_FAULT_BUFFER_A, 0 },
|
|
{}
|
|
};
|
|
struct nouveau_svm *svm;
|
|
int ret;
|
|
|
|
/* Disable on Volta and newer until channel recovery is fixed,
|
|
* otherwise clients will have a trivial way to trash the GPU
|
|
* for everyone.
|
|
*/
|
|
if (drm->client.device.info.family > NV_DEVICE_INFO_V0_PASCAL)
|
|
return;
|
|
|
|
if (!(drm->svm = svm = kzalloc(sizeof(*drm->svm), GFP_KERNEL)))
|
|
return;
|
|
|
|
drm->svm->drm = drm;
|
|
mutex_init(&drm->svm->mutex);
|
|
INIT_LIST_HEAD(&drm->svm->inst);
|
|
|
|
ret = nvif_mclass(&drm->client.device.object, buffers);
|
|
if (ret < 0) {
|
|
SVM_DBG(svm, "No supported fault buffer class");
|
|
nouveau_svm_fini(drm);
|
|
return;
|
|
}
|
|
|
|
ret = nouveau_svm_fault_buffer_ctor(svm, buffers[ret].oclass, 0);
|
|
if (ret) {
|
|
nouveau_svm_fini(drm);
|
|
return;
|
|
}
|
|
|
|
SVM_DBG(svm, "Initialised");
|
|
}
|