240 lines
7.3 KiB
C
240 lines
7.3 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*/
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#ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
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#define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
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#include "core_types.h"
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#include "core_status.h"
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#include "dal_asic_id.h"
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#include "dm_pp_smu.h"
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#define MEMORY_TYPE_MULTIPLIER_CZ 4
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#define MEMORY_TYPE_HBM 2
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#define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
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#define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
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#define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
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enum dce_version resource_parse_asic_id(
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struct hw_asic_id asic_id);
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struct resource_caps {
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int num_timing_generator;
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int num_opp;
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int num_video_plane;
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int num_audio;
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int num_stream_encoder;
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int num_pll;
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int num_dwb;
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int num_ddc;
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int num_vmid;
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int num_dsc;
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unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output).
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unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters).
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int num_hpo_dp_stream_encoder;
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int num_hpo_dp_link_encoder;
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int num_mpc_3dlut;
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};
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struct resource_straps {
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uint32_t hdmi_disable;
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uint32_t dc_pinstraps_audio;
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uint32_t audio_stream_number;
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};
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struct resource_create_funcs {
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void (*read_dce_straps)(
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struct dc_context *ctx, struct resource_straps *straps);
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struct audio *(*create_audio)(
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struct dc_context *ctx, unsigned int inst);
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struct stream_encoder *(*create_stream_encoder)(
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enum engine_id eng_id, struct dc_context *ctx);
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struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)(
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enum engine_id eng_id, struct dc_context *ctx);
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struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)(
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uint8_t inst,
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struct dc_context *ctx);
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struct dce_hwseq *(*create_hwseq)(
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struct dc_context *ctx);
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};
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bool resource_construct(
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unsigned int num_virtual_links,
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struct dc *dc,
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struct resource_pool *pool,
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const struct resource_create_funcs *create_funcs);
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struct resource_pool *dc_create_resource_pool(struct dc *dc,
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const struct dc_init_data *init_data,
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enum dce_version dc_version);
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void dc_destroy_resource_pool(struct dc *dc);
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enum dc_status resource_map_pool_resources(
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const struct dc *dc,
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struct dc_state *context,
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struct dc_stream_state *stream);
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bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
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enum dc_status resource_build_scaling_params_for_context(
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const struct dc *dc,
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struct dc_state *context);
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void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
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void resource_unreference_clock_source(
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struct resource_context *res_ctx,
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const struct resource_pool *pool,
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struct clock_source *clock_source);
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void resource_reference_clock_source(
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struct resource_context *res_ctx,
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const struct resource_pool *pool,
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struct clock_source *clock_source);
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int resource_get_clock_source_reference(
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struct resource_context *res_ctx,
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const struct resource_pool *pool,
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struct clock_source *clock_source);
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bool resource_are_streams_timing_synchronizable(
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struct dc_stream_state *stream1,
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struct dc_stream_state *stream2);
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bool resource_are_vblanks_synchronizable(
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struct dc_stream_state *stream1,
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struct dc_stream_state *stream2);
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struct clock_source *resource_find_used_clk_src_for_sharing(
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struct resource_context *res_ctx,
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struct pipe_ctx *pipe_ctx);
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struct clock_source *dc_resource_find_first_free_pll(
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struct resource_context *res_ctx,
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const struct resource_pool *pool);
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struct pipe_ctx *resource_get_head_pipe_for_stream(
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struct resource_context *res_ctx,
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struct dc_stream_state *stream);
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bool resource_attach_surfaces_to_context(
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struct dc_plane_state *const *plane_state,
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int surface_count,
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struct dc_stream_state *dc_stream,
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struct dc_state *context,
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const struct resource_pool *pool);
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struct pipe_ctx *find_idle_secondary_pipe(
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struct resource_context *res_ctx,
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const struct resource_pool *pool,
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const struct pipe_ctx *primary_pipe);
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bool resource_validate_attach_surfaces(
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const struct dc_validation_set set[],
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int set_count,
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const struct dc_state *old_context,
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struct dc_state *context,
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const struct resource_pool *pool);
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void resource_validate_ctx_update_pointer_after_copy(
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const struct dc_state *src_ctx,
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struct dc_state *dst_ctx);
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enum dc_status resource_map_clock_resources(
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const struct dc *dc,
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struct dc_state *context,
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struct dc_stream_state *stream);
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enum dc_status resource_map_phy_clock_resources(
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const struct dc *dc,
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struct dc_state *context,
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struct dc_stream_state *stream);
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bool pipe_need_reprogram(
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struct pipe_ctx *pipe_ctx_old,
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struct pipe_ctx *pipe_ctx);
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void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
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struct bit_depth_reduction_params *fmt_bit_depth);
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void update_audio_usage(
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struct resource_context *res_ctx,
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const struct resource_pool *pool,
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struct audio *audio,
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bool acquired);
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unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
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void get_audio_check(struct audio_info *aud_modes,
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struct audio_check *aud_chk);
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int get_num_mpc_splits(struct pipe_ctx *pipe);
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int get_num_odm_splits(struct pipe_ctx *pipe);
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bool get_temp_dp_link_res(struct dc_link *link,
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struct link_resource *link_res,
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struct dc_link_settings *link_settings);
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt(
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const struct resource_context *res_ctx,
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const struct resource_pool *pool,
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const struct dc_link *link);
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#endif
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void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
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struct dc_state *context);
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void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
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struct dc_state *context,
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uint8_t disabled_master_pipe_idx);
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void reset_sync_context_for_pipe(const struct dc *dc,
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struct dc_state *context,
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uint8_t pipe_idx);
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uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);
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const struct link_hwss *get_link_hwss(const struct dc_link *link,
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const struct link_resource *link_res);
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bool is_h_timing_divisible_by_2(struct dc_stream_state *stream);
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bool dc_resource_acquire_secondary_pipe_for_mpc_odm(
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const struct dc *dc,
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struct dc_state *state,
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struct pipe_ctx *pri_pipe,
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struct pipe_ctx *sec_pipe,
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bool odm);
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#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
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