140 lines
3.4 KiB
C
140 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* SH4-202 Setup
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*
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* Copyright (C) 2006 Paul Mundt
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* Copyright (C) 2009 Magnus Damm
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*/
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_timer.h>
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#include <linux/sh_intc.h>
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#include <linux/io.h>
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#include <asm/platform_early.h>
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static struct plat_sci_port scif0_platform_data = {
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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};
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static struct resource scif0_resources[] = {
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DEFINE_RES_MEM(0xffe80000, 0x100),
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DEFINE_RES_IRQ(evt2irq(0x700)),
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DEFINE_RES_IRQ(evt2irq(0x720)),
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DEFINE_RES_IRQ(evt2irq(0x760)),
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DEFINE_RES_IRQ(evt2irq(0x740)),
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};
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static struct platform_device scif0_device = {
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.name = "sh-sci",
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.id = 0,
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.resource = scif0_resources,
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.num_resources = ARRAY_SIZE(scif0_resources),
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.dev = {
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.platform_data = &scif0_platform_data,
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},
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};
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static struct sh_timer_config tmu0_platform_data = {
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.channels_mask = 7,
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};
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static struct resource tmu0_resources[] = {
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DEFINE_RES_MEM(0xffd80000, 0x30),
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DEFINE_RES_IRQ(evt2irq(0x400)),
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DEFINE_RES_IRQ(evt2irq(0x420)),
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DEFINE_RES_IRQ(evt2irq(0x440)),
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};
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static struct platform_device tmu0_device = {
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.name = "sh-tmu",
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.id = 0,
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.dev = {
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.platform_data = &tmu0_platform_data,
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},
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.resource = tmu0_resources,
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.num_resources = ARRAY_SIZE(tmu0_resources),
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};
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static struct platform_device *sh4202_devices[] __initdata = {
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&scif0_device,
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&tmu0_device,
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};
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static int __init sh4202_devices_setup(void)
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{
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return platform_add_devices(sh4202_devices,
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ARRAY_SIZE(sh4202_devices));
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}
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arch_initcall(sh4202_devices_setup);
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static struct platform_device *sh4202_early_devices[] __initdata = {
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&scif0_device,
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&tmu0_device,
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};
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void __init plat_early_device_setup(void)
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{
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sh_early_platform_add_devices(sh4202_early_devices,
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ARRAY_SIZE(sh4202_early_devices));
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}
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enum {
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UNUSED = 0,
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/* interrupt sources */
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IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
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HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT,
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};
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static struct intc_vect vectors[] __initdata = {
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INTC_VECT(HUDI, 0x600),
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INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
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INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
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INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
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INTC_VECT(RTC, 0x4c0),
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INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
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INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
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INTC_VECT(WDT, 0x560),
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};
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static struct intc_prio_reg prio_registers[] __initdata = {
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{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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{ 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
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{ 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } },
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{ 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
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};
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static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL,
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NULL, prio_registers, NULL);
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static struct intc_vect vectors_irlm[] __initdata = {
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INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
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INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
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};
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static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL,
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NULL, prio_registers, NULL);
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void __init plat_irq_setup(void)
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{
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register_intc_controller(&intc_desc);
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}
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#define INTC_ICR 0xffd00000UL
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#define INTC_ICR_IRLM (1<<7)
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void __init plat_irq_setup_pins(int mode)
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{
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switch (mode) {
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case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
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__raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
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register_intc_controller(&intc_desc_irlm);
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break;
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default:
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BUG();
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}
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}
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