334 lines
9.3 KiB
C
334 lines
9.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __RISCV_KVM_HOST_H__
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#define __RISCV_KVM_HOST_H__
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#include <linux/types.h>
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#include <linux/kvm.h>
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#include <linux/kvm_types.h>
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#include <linux/spinlock.h>
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#include <asm/csr.h>
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#include <asm/hwcap.h>
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#include <asm/kvm_vcpu_fp.h>
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#include <asm/kvm_vcpu_insn.h>
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#include <asm/kvm_vcpu_timer.h>
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#define KVM_MAX_VCPUS 1024
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#define KVM_HALT_POLL_NS_DEFAULT 500000
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#define KVM_VCPU_MAX_FEATURES 0
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#define KVM_REQ_SLEEP \
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KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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#define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1)
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#define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2)
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#define KVM_REQ_FENCE_I \
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KVM_ARCH_REQ_FLAGS(3, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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#define KVM_REQ_HFENCE_GVMA_VMID_ALL KVM_REQ_TLB_FLUSH
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#define KVM_REQ_HFENCE_VVMA_ALL \
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KVM_ARCH_REQ_FLAGS(4, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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#define KVM_REQ_HFENCE \
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KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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enum kvm_riscv_hfence_type {
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KVM_RISCV_HFENCE_UNKNOWN = 0,
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KVM_RISCV_HFENCE_GVMA_VMID_GPA,
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KVM_RISCV_HFENCE_VVMA_ASID_GVA,
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KVM_RISCV_HFENCE_VVMA_ASID_ALL,
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KVM_RISCV_HFENCE_VVMA_GVA,
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};
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struct kvm_riscv_hfence {
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enum kvm_riscv_hfence_type type;
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unsigned long asid;
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unsigned long order;
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gpa_t addr;
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gpa_t size;
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};
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#define KVM_RISCV_VCPU_MAX_HFENCE 64
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struct kvm_vm_stat {
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struct kvm_vm_stat_generic generic;
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};
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struct kvm_vcpu_stat {
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struct kvm_vcpu_stat_generic generic;
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u64 ecall_exit_stat;
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u64 wfi_exit_stat;
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u64 mmio_exit_user;
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u64 mmio_exit_kernel;
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u64 csr_exit_user;
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u64 csr_exit_kernel;
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u64 signal_exits;
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u64 exits;
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};
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struct kvm_arch_memory_slot {
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};
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struct kvm_vmid {
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/*
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* Writes to vmid_version and vmid happen with vmid_lock held
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* whereas reads happen without any lock held.
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*/
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unsigned long vmid_version;
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unsigned long vmid;
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};
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struct kvm_arch {
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/* G-stage vmid */
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struct kvm_vmid vmid;
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/* G-stage page table */
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pgd_t *pgd;
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phys_addr_t pgd_phys;
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/* Guest Timer */
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struct kvm_guest_timer timer;
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};
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struct kvm_sbi_context {
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int return_handled;
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};
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struct kvm_cpu_trap {
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unsigned long sepc;
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unsigned long scause;
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unsigned long stval;
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unsigned long htval;
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unsigned long htinst;
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};
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struct kvm_cpu_context {
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unsigned long zero;
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unsigned long ra;
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unsigned long sp;
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unsigned long gp;
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unsigned long tp;
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unsigned long t0;
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unsigned long t1;
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unsigned long t2;
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unsigned long s0;
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unsigned long s1;
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unsigned long a0;
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unsigned long a1;
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unsigned long a2;
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unsigned long a3;
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unsigned long a4;
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unsigned long a5;
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unsigned long a6;
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unsigned long a7;
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unsigned long s2;
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unsigned long s3;
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unsigned long s4;
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unsigned long s5;
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unsigned long s6;
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unsigned long s7;
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unsigned long s8;
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unsigned long s9;
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unsigned long s10;
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unsigned long s11;
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unsigned long t3;
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unsigned long t4;
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unsigned long t5;
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unsigned long t6;
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unsigned long sepc;
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unsigned long sstatus;
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unsigned long hstatus;
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union __riscv_fp_state fp;
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};
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struct kvm_vcpu_csr {
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unsigned long vsstatus;
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unsigned long vsie;
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unsigned long vstvec;
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unsigned long vsscratch;
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unsigned long vsepc;
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unsigned long vscause;
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unsigned long vstval;
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unsigned long hvip;
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unsigned long vsatp;
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unsigned long scounteren;
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};
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struct kvm_vcpu_arch {
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/* VCPU ran at least once */
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bool ran_atleast_once;
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/* Last Host CPU on which Guest VCPU exited */
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int last_exit_cpu;
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/* ISA feature bits (similar to MISA) */
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DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX);
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/* SSCRATCH, STVEC, and SCOUNTEREN of Host */
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unsigned long host_sscratch;
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unsigned long host_stvec;
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unsigned long host_scounteren;
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/* CPU context of Host */
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struct kvm_cpu_context host_context;
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/* CPU context of Guest VCPU */
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struct kvm_cpu_context guest_context;
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/* CPU CSR context of Guest VCPU */
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struct kvm_vcpu_csr guest_csr;
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/* CPU context upon Guest VCPU reset */
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struct kvm_cpu_context guest_reset_context;
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/* CPU CSR context upon Guest VCPU reset */
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struct kvm_vcpu_csr guest_reset_csr;
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/*
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* VCPU interrupts
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*
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* We have a lockless approach for tracking pending VCPU interrupts
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* implemented using atomic bitops. The irqs_pending bitmap represent
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* pending interrupts whereas irqs_pending_mask represent bits changed
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* in irqs_pending. Our approach is modeled around multiple producer
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* and single consumer problem where the consumer is the VCPU itself.
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*/
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unsigned long irqs_pending;
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unsigned long irqs_pending_mask;
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/* VCPU Timer */
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struct kvm_vcpu_timer timer;
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/* HFENCE request queue */
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spinlock_t hfence_lock;
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unsigned long hfence_head;
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unsigned long hfence_tail;
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struct kvm_riscv_hfence hfence_queue[KVM_RISCV_VCPU_MAX_HFENCE];
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/* MMIO instruction details */
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struct kvm_mmio_decode mmio_decode;
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/* CSR instruction details */
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struct kvm_csr_decode csr_decode;
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/* SBI context */
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struct kvm_sbi_context sbi_context;
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/* Cache pages needed to program page tables with spinlock held */
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struct kvm_mmu_memory_cache mmu_page_cache;
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/* VCPU power-off state */
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bool power_off;
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/* Don't run the VCPU (blocked) */
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bool pause;
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};
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static inline void kvm_arch_hardware_unsetup(void) {}
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static inline void kvm_arch_sync_events(struct kvm *kvm) {}
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static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
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#define KVM_ARCH_WANT_MMU_NOTIFIER
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#define KVM_RISCV_GSTAGE_TLB_MIN_ORDER 12
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void kvm_riscv_local_hfence_gvma_vmid_gpa(unsigned long vmid,
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gpa_t gpa, gpa_t gpsz,
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unsigned long order);
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void kvm_riscv_local_hfence_gvma_vmid_all(unsigned long vmid);
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void kvm_riscv_local_hfence_gvma_gpa(gpa_t gpa, gpa_t gpsz,
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unsigned long order);
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void kvm_riscv_local_hfence_gvma_all(void);
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void kvm_riscv_local_hfence_vvma_asid_gva(unsigned long vmid,
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unsigned long asid,
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unsigned long gva,
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unsigned long gvsz,
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unsigned long order);
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void kvm_riscv_local_hfence_vvma_asid_all(unsigned long vmid,
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unsigned long asid);
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void kvm_riscv_local_hfence_vvma_gva(unsigned long vmid,
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unsigned long gva, unsigned long gvsz,
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unsigned long order);
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void kvm_riscv_local_hfence_vvma_all(unsigned long vmid);
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void kvm_riscv_local_tlb_sanitize(struct kvm_vcpu *vcpu);
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void kvm_riscv_fence_i_process(struct kvm_vcpu *vcpu);
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void kvm_riscv_hfence_gvma_vmid_all_process(struct kvm_vcpu *vcpu);
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void kvm_riscv_hfence_vvma_all_process(struct kvm_vcpu *vcpu);
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void kvm_riscv_hfence_process(struct kvm_vcpu *vcpu);
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void kvm_riscv_fence_i(struct kvm *kvm,
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unsigned long hbase, unsigned long hmask);
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void kvm_riscv_hfence_gvma_vmid_gpa(struct kvm *kvm,
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unsigned long hbase, unsigned long hmask,
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gpa_t gpa, gpa_t gpsz,
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unsigned long order);
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void kvm_riscv_hfence_gvma_vmid_all(struct kvm *kvm,
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unsigned long hbase, unsigned long hmask);
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void kvm_riscv_hfence_vvma_asid_gva(struct kvm *kvm,
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unsigned long hbase, unsigned long hmask,
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unsigned long gva, unsigned long gvsz,
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unsigned long order, unsigned long asid);
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void kvm_riscv_hfence_vvma_asid_all(struct kvm *kvm,
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unsigned long hbase, unsigned long hmask,
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unsigned long asid);
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void kvm_riscv_hfence_vvma_gva(struct kvm *kvm,
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unsigned long hbase, unsigned long hmask,
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unsigned long gva, unsigned long gvsz,
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unsigned long order);
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void kvm_riscv_hfence_vvma_all(struct kvm *kvm,
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unsigned long hbase, unsigned long hmask);
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int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa,
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phys_addr_t hpa, unsigned long size,
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bool writable, bool in_atomic);
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void kvm_riscv_gstage_iounmap(struct kvm *kvm, gpa_t gpa,
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unsigned long size);
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int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
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struct kvm_memory_slot *memslot,
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gpa_t gpa, unsigned long hva, bool is_write);
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int kvm_riscv_gstage_alloc_pgd(struct kvm *kvm);
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void kvm_riscv_gstage_free_pgd(struct kvm *kvm);
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void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu);
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void kvm_riscv_gstage_mode_detect(void);
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unsigned long kvm_riscv_gstage_mode(void);
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int kvm_riscv_gstage_gpa_bits(void);
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void kvm_riscv_gstage_vmid_detect(void);
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unsigned long kvm_riscv_gstage_vmid_bits(void);
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int kvm_riscv_gstage_vmid_init(struct kvm *kvm);
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bool kvm_riscv_gstage_vmid_ver_changed(struct kvm_vmid *vmid);
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void kvm_riscv_gstage_vmid_update(struct kvm_vcpu *vcpu);
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void __kvm_riscv_unpriv_trap(void);
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unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu,
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bool read_insn,
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unsigned long guest_addr,
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struct kvm_cpu_trap *trap);
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void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu,
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struct kvm_cpu_trap *trap);
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int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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struct kvm_cpu_trap *trap);
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void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch);
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int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
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int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
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void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu);
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void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu);
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bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, unsigned long mask);
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void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu);
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void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
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int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run);
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#endif /* __RISCV_KVM_HOST_H__ */
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