481 lines
11 KiB
C
481 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2000, 2001, 2002 Broadcom Corporation
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*/
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/*
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*
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* Broadcom Common Firmware Environment (CFE)
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*
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* This module contains device function stubs (small routines to
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* call the standard "iocb" interface entry point to CFE).
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* There should be one routine here per iocb function call.
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*
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* Authors: Mitch Lichtenberg, Chris Demetriou
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/printk.h>
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#include <asm/mipsregs.h>
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#include <asm/fw/cfe/cfe_api.h>
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#include "cfe_api_int.h"
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unsigned long __initdata cfe_seal;
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/* Cast from a native pointer to a cfe_xptr_t and back. */
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#define XPTR_FROM_NATIVE(n) ((cfe_xptr_t) (intptr_t) (n))
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#define NATIVE_FROM_XPTR(x) ((void *) (intptr_t) (x))
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int cfe_iocb_dispatch(struct cfe_xiocb *xiocb);
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/*
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* Declare the dispatch function with args of "intptr_t".
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* This makes sure whatever model we're compiling in
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* puts the pointers in a single register. For example,
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* combining -mlong64 and -mips1 or -mips2 would lead to
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* trouble, since the handle and IOCB pointer will be
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* passed in two registers each, and CFE expects one.
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*/
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static int (*cfe_dispfunc) (intptr_t handle, intptr_t xiocb);
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static u64 cfe_handle;
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int cfe_init(u64 handle, u64 ept)
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{
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cfe_dispfunc = NATIVE_FROM_XPTR(ept);
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cfe_handle = handle;
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return 0;
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}
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int cfe_iocb_dispatch(struct cfe_xiocb * xiocb)
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{
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if (!cfe_dispfunc)
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return -1;
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return (*cfe_dispfunc) ((intptr_t) cfe_handle, (intptr_t) xiocb);
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}
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int cfe_close(int handle)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_CLOSE;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = handle;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = 0;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_cpuctl);
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xiocb.plist.xiocb_cpuctl.cpu_number = cpu;
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xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_START;
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xiocb.plist.xiocb_cpuctl.gp_val = gp;
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xiocb.plist.xiocb_cpuctl.sp_val = sp;
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xiocb.plist.xiocb_cpuctl.a1_val = a1;
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xiocb.plist.xiocb_cpuctl.start_addr = (long) fn;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int cfe_cpu_stop(int cpu)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_cpuctl);
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xiocb.plist.xiocb_cpuctl.cpu_number = cpu;
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xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_STOP;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_ENV_SET;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_envbuf);
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xiocb.plist.xiocb_envbuf.enum_idx = idx;
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xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
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xiocb.plist.xiocb_envbuf.name_length = namelen;
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xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
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xiocb.plist.xiocb_envbuf.val_length = vallen;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int
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cfe_enummem(int idx, int flags, u64 *start, u64 *length, u64 *type)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_FW_MEMENUM;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = flags;
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xiocb.xiocb_psize = sizeof(struct xiocb_meminfo);
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xiocb.plist.xiocb_meminfo.mi_idx = idx;
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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*start = xiocb.plist.xiocb_meminfo.mi_addr;
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*length = xiocb.plist.xiocb_meminfo.mi_size;
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*type = xiocb.plist.xiocb_meminfo.mi_type;
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return 0;
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}
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int cfe_exit(int warm, int status)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_FW_RESTART;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = warm ? CFE_FLG_WARMSTART : 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_exitstat);
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xiocb.plist.xiocb_exitstat.status = status;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int cfe_flushcache(int flg)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_FW_FLUSHCACHE;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = flg;
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xiocb.xiocb_psize = 0;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int cfe_getdevinfo(char *name)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_GETINFO;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_buffer);
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xiocb.plist.xiocb_buffer.buf_offset = 0;
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xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name);
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xiocb.plist.xiocb_buffer.buf_length = strlen(name);
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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return xiocb.plist.xiocb_buffer.buf_ioctlcmd;
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}
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int cfe_getenv(char *name, char *dest, int destlen)
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{
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struct cfe_xiocb xiocb;
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*dest = 0;
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xiocb.xiocb_fcode = CFE_CMD_ENV_GET;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_envbuf);
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xiocb.plist.xiocb_envbuf.enum_idx = 0;
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xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
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xiocb.plist.xiocb_envbuf.name_length = strlen(name);
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xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(dest);
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xiocb.plist.xiocb_envbuf.val_length = destlen;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int cfe_getfwinfo(cfe_fwinfo_t * info)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_FW_GETINFO;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_fwinfo);
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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info->fwi_version = xiocb.plist.xiocb_fwinfo.fwi_version;
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info->fwi_totalmem = xiocb.plist.xiocb_fwinfo.fwi_totalmem;
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info->fwi_flags = xiocb.plist.xiocb_fwinfo.fwi_flags;
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info->fwi_boardid = xiocb.plist.xiocb_fwinfo.fwi_boardid;
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info->fwi_bootarea_va = xiocb.plist.xiocb_fwinfo.fwi_bootarea_va;
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info->fwi_bootarea_pa = xiocb.plist.xiocb_fwinfo.fwi_bootarea_pa;
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info->fwi_bootarea_size =
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xiocb.plist.xiocb_fwinfo.fwi_bootarea_size;
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return 0;
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}
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int cfe_getstdhandle(int flg)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_GETHANDLE;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = flg;
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xiocb.xiocb_psize = 0;
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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return xiocb.xiocb_handle;
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}
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int64_t
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cfe_getticks(void)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_FW_GETTIME;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_time);
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xiocb.plist.xiocb_time.ticks = 0;
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cfe_iocb_dispatch(&xiocb);
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return xiocb.plist.xiocb_time.ticks;
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}
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int cfe_inpstat(int handle)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_INPSTAT;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = handle;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_inpstat);
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xiocb.plist.xiocb_inpstat.inp_status = 0;
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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return xiocb.plist.xiocb_inpstat.inp_status;
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}
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int
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cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer,
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int length, int *retlen, u64 offset)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_IOCTL;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = handle;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_buffer);
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xiocb.plist.xiocb_buffer.buf_offset = offset;
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xiocb.plist.xiocb_buffer.buf_ioctlcmd = ioctlnum;
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xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
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xiocb.plist.xiocb_buffer.buf_length = length;
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cfe_iocb_dispatch(&xiocb);
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if (retlen)
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*retlen = xiocb.plist.xiocb_buffer.buf_retlen;
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return xiocb.xiocb_status;
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}
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int cfe_open(char *name)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_OPEN;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_buffer);
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xiocb.plist.xiocb_buffer.buf_offset = 0;
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xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name);
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xiocb.plist.xiocb_buffer.buf_length = strlen(name);
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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return xiocb.xiocb_handle;
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}
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int cfe_read(int handle, unsigned char *buffer, int length)
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{
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return cfe_readblk(handle, 0, buffer, length);
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}
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int cfe_readblk(int handle, s64 offset, unsigned char *buffer, int length)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_READ;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = handle;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_buffer);
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xiocb.plist.xiocb_buffer.buf_offset = offset;
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xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
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xiocb.plist.xiocb_buffer.buf_length = length;
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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return xiocb.plist.xiocb_buffer.buf_retlen;
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}
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int cfe_setenv(char *name, char *val)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_ENV_SET;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = 0;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_envbuf);
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xiocb.plist.xiocb_envbuf.enum_idx = 0;
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xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
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xiocb.plist.xiocb_envbuf.name_length = strlen(name);
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xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
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xiocb.plist.xiocb_envbuf.val_length = strlen(val);
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cfe_iocb_dispatch(&xiocb);
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return xiocb.xiocb_status;
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}
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int cfe_write(int handle, const char *buffer, int length)
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{
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return cfe_writeblk(handle, 0, buffer, length);
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}
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int cfe_writeblk(int handle, s64 offset, const char *buffer, int length)
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{
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struct cfe_xiocb xiocb;
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xiocb.xiocb_fcode = CFE_CMD_DEV_WRITE;
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xiocb.xiocb_status = 0;
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xiocb.xiocb_handle = handle;
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xiocb.xiocb_flags = 0;
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xiocb.xiocb_psize = sizeof(struct xiocb_buffer);
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xiocb.plist.xiocb_buffer.buf_offset = offset;
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xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
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xiocb.plist.xiocb_buffer.buf_length = length;
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cfe_iocb_dispatch(&xiocb);
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if (xiocb.xiocb_status < 0)
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return xiocb.xiocb_status;
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return xiocb.plist.xiocb_buffer.buf_retlen;
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}
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void __init cfe_die(char *fmt, ...)
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{
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unsigned int prid, __maybe_unused rev;
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char msg[128];
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va_list ap;
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int handle;
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unsigned int count;
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va_start(ap, fmt);
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vsprintf(msg, fmt, ap);
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strcat(msg, "\r\n");
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if (cfe_seal != CFE_EPTSEAL)
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goto no_cfe;
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prid = read_c0_prid();
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if ((prid & PRID_COMP_MASK) != PRID_COMP_BROADCOM)
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goto no_cfe;
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rev = prid & PRID_REV_MASK;
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/* disable XKS01 so that CFE can access the registers */
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switch (prid & PRID_IMP_MASK) {
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#ifdef CONFIG_CPU_BMIPS4380
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case PRID_IMP_BMIPS43XX:
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if (rev >= PRID_REV_BMIPS4380_LO &&
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rev <= PRID_REV_BMIPS4380_HI)
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__write_32bit_c0_register($22, 3,
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__read_32bit_c0_register($22, 3) & ~BIT(12));
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break;
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#endif
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#ifdef CONFIG_CPU_BMIPS5000
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case PRID_IMP_BMIPS5000:
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case PRID_IMP_BMIPS5200:
|
|
__write_32bit_c0_register($22, 5,
|
|
__read_32bit_c0_register($22, 5) & ~BIT(8));
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
|
|
handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
|
|
if (handle < 0)
|
|
goto no_cfe;
|
|
|
|
cfe_write(handle, msg, strlen(msg));
|
|
|
|
for (count = 0; count < 0x7fffffff; count++)
|
|
mb();
|
|
cfe_exit(0, 1);
|
|
while (1)
|
|
;
|
|
|
|
no_cfe:
|
|
/* probably won't print anywhere useful */
|
|
panic("%s", msg);
|
|
|
|
va_end(ap);
|
|
}
|