150 lines
3.8 KiB
C
150 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/***************************************************************************/
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/*
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* sltimers.c -- generic ColdFire slice timer support.
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*
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* Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be>
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* based on
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* timers.c -- generic ColdFire hardware timer support.
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* Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/profile.h>
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#include <linux/clocksource.h>
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#include <asm/io.h>
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#include <asm/traps.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfslt.h>
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#include <asm/mcfsim.h>
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/***************************************************************************/
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#ifdef CONFIG_HIGHPROFILE
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/*
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* By default use Slice Timer 1 as the profiler clock timer.
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*/
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#define PA(a) (MCFSLT_TIMER1 + (a))
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/*
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* Choose a reasonably fast profile timer. Make it an odd value to
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* try and get good coverage of kernel operations.
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*/
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#define PROFILEHZ 1013
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irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
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{
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/* Reset Slice Timer 1 */
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__raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
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if (current->pid)
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profile_tick(CPU_PROFILING);
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return IRQ_HANDLED;
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}
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void mcfslt_profile_init(void)
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{
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int ret;
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printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n",
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PROFILEHZ);
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ret = request_irq(MCF_IRQ_PROFILER, mcfslt_profile_tick, IRQF_TIMER,
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"profile timer", NULL);
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if (ret) {
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pr_err("Failed to request irq %d (profile timer): %pe\n",
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MCF_IRQ_PROFILER, ERR_PTR(ret));
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}
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/* Set up TIMER 2 as high speed profile clock */
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__raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
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__raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
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PA(MCFSLT_SCR));
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}
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#endif /* CONFIG_HIGHPROFILE */
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/***************************************************************************/
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/*
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* By default use Slice Timer 0 as the system clock timer.
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*/
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#define TA(a) (MCFSLT_TIMER0 + (a))
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static u32 mcfslt_cycles_per_jiffy;
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static u32 mcfslt_cnt;
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static irqreturn_t mcfslt_tick(int irq, void *dummy)
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{
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/* Reset Slice Timer 0 */
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__raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
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mcfslt_cnt += mcfslt_cycles_per_jiffy;
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legacy_timer_tick(1);
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return IRQ_HANDLED;
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}
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static u64 mcfslt_read_clk(struct clocksource *cs)
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{
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unsigned long flags;
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u32 cycles, scnt;
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local_irq_save(flags);
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scnt = __raw_readl(TA(MCFSLT_SCNT));
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cycles = mcfslt_cnt;
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if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) {
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cycles += mcfslt_cycles_per_jiffy;
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scnt = __raw_readl(TA(MCFSLT_SCNT));
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}
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local_irq_restore(flags);
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/* subtract because slice timers count down */
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return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt);
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}
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static struct clocksource mcfslt_clk = {
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.name = "slt",
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.rating = 250,
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.read = mcfslt_read_clk,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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void hw_timer_init(void)
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{
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int r;
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mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
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/*
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* The coldfire slice timer (SLT) runs from STCNT to 0 included,
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* then STCNT again and so on. It counts thus actually
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* STCNT + 1 steps for 1 tick, not STCNT. So if you want
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* n cycles, initialize STCNT with n - 1.
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*/
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__raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
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__raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
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TA(MCFSLT_SCR));
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/* initialize mcfslt_cnt knowing that slice timers count down */
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mcfslt_cnt = mcfslt_cycles_per_jiffy;
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r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL);
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if (r) {
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pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
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ERR_PTR(r));
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}
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clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);
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#ifdef CONFIG_HIGHPROFILE
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mcfslt_profile_init();
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#endif
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}
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