451 lines
9.7 KiB
Plaintext
451 lines
9.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2022 BayLibre, SAS.
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* Author: Fabien Parent <fparent@baylibre.com>
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*/
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/dts-v1/;
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#include "mt8195.dtsi"
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#include "mt6359.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
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#include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
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/ {
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model = "MediaTek MT8195 demo board";
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compatible = "mediatek,mt8195-demo", "mediatek,mt8195";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:921600n8";
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_keys_pins>;
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key-0 {
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gpios = <&pio 106 GPIO_ACTIVE_LOW>;
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label = "volume_up";
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linux,code = <KEY_VOLUMEUP>;
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wakeup-source;
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debounce-interval = <15>;
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};
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
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bl31_secmon_reserved: secmon@54600000 {
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no-map;
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reg = <0 0x54600000 0x0 0x200000>;
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};
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/* 12 MiB reserved for OP-TEE (BL32)
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* +-----------------------+ 0x43e0_0000
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* | SHMEM 2MiB |
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* +-----------------------+ 0x43c0_0000
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* | | TA_RAM 8MiB |
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* + TZDRAM +--------------+ 0x4340_0000
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* | | TEE_RAM 2MiB |
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* +-----------------------+ 0x4320_0000
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*/
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optee_reserved: optee@43200000 {
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no-map;
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reg = <0 0x43200000 0 0x00c00000>;
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};
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};
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};
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&i2c6 {
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clock-frequency = <400000>;
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pinctrl-0 = <&i2c6_pins>;
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pinctrl-names = "default";
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status = "okay";
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mt6360: pmic@34 {
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compatible = "mediatek,mt6360";
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reg = <0x34>;
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interrupt-controller;
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interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>;
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interrupt-names = "IRQB";
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charger {
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compatible = "mediatek,mt6360-chg";
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richtek,vinovp-microvolt = <14500000>;
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otg_vbus_regulator: usb-otg-vbus-regulator {
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regulator-compatible = "usb-otg-vbus";
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regulator-name = "usb-otg-vbus";
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regulator-min-microvolt = <4425000>;
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regulator-max-microvolt = <5825000>;
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};
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};
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regulator {
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compatible = "mediatek,mt6360-regulator";
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LDO_VIN3-supply = <&mt6360_buck2>;
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mt6360_buck1: buck1 {
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regulator-compatible = "BUCK1";
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regulator-name = "mt6360,buck1";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1300000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP
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MT6360_OPMODE_ULP>;
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regulator-always-on;
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};
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mt6360_buck2: buck2 {
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regulator-compatible = "BUCK2";
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regulator-name = "mt6360,buck2";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1300000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP
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MT6360_OPMODE_ULP>;
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regulator-always-on;
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};
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mt6360_ldo1: ldo1 {
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regulator-compatible = "LDO1";
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regulator-name = "mt6360,ldo1";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3600000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo2: ldo2 {
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regulator-compatible = "LDO2";
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regulator-name = "mt6360,ldo2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3600000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo3: ldo3 {
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regulator-compatible = "LDO3";
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regulator-name = "mt6360,ldo3";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3600000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo5: ldo5 {
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regulator-compatible = "LDO5";
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regulator-name = "mt6360,ldo5";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <3600000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo6: ldo6 {
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regulator-compatible = "LDO6";
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regulator-name = "mt6360,ldo6";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <2100000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo7: ldo7 {
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regulator-compatible = "LDO7";
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regulator-name = "mt6360,ldo7";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <2100000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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regulator-always-on;
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};
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};
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};
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_default_pins>;
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pinctrl-1 = <&mmc0_uhs_pins>;
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bus-width = <8>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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cap-mmc-hw-reset;
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no-sdio;
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no-sd;
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hs400-ds-delay = <0x14c11>;
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vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
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vqmmc-supply = <&mt6359_vufs_ldo_reg>;
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non-removable;
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};
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&mmc1 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc1_default_pins>;
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pinctrl-1 = <&mmc1_uhs_pins>;
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cd-gpios = <&pio 129 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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max-frequency = <200000000>;
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cap-sd-highspeed;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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vmmc-supply = <&mt6360_ldo5>;
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vqmmc-supply = <&mt6360_ldo3>;
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status = "okay";
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};
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&mt6359_vbbck_ldo_reg {
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regulator-always-on;
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};
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&mt6359_vcore_buck_reg {
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regulator-always-on;
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};
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&mt6359_vgpu11_buck_reg {
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regulator-always-on;
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};
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&mt6359_vproc1_buck_reg {
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regulator-always-on;
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};
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&mt6359_vproc2_buck_reg {
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regulator-always-on;
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};
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&mt6359_vpu_buck_reg {
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regulator-always-on;
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};
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&mt6359_vrf12_ldo_reg {
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regulator-always-on;
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};
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&mt6359_vsram_md_ldo_reg {
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regulator-always-on;
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};
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&mt6359_vsram_others_ldo_reg {
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regulator-always-on;
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};
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&pio {
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gpio_keys_pins: gpio-keys-pins {
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pins {
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pinmux = <PINMUX_GPIO106__FUNC_GPIO106>;
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input-enable;
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};
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};
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i2c6_pins: i2c6-pins {
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pins {
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pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
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<PINMUX_GPIO26__FUNC_SCL6>;
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bias-pull-up;
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};
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};
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mmc0_default_pins: mmc0-default-pins {
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pins-clk {
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pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
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drive-strength = <MTK_DRIVE_6mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO121__FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <MTK_DRIVE_6mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-rst {
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pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
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drive-strength = <MTK_DRIVE_6mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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};
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mmc0_uhs_pins: mmc0-uhs-pins {
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pins-clk {
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pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO121__FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-ds {
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pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-rst {
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pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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};
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mmc1_default_pins: mmc1-default-pins {
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pins-clk {
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pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
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<PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
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input-enable;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-insert {
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pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
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bias-pull-up;
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};
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};
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mmc1_uhs_pins: mmc1-uhs-pins {
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pins-clk {
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pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
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<PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
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input-enable;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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};
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uart0_pins: uart0-pins {
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pins {
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pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
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<PINMUX_GPIO99__FUNC_URXD0>;
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};
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};
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uart1_pins: uart1-pins {
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pins {
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pinmux = <PINMUX_GPIO102__FUNC_UTXD1>,
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<PINMUX_GPIO103__FUNC_URXD1>;
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};
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};
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};
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&pmic {
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interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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&u3phy0 {
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status = "okay";
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};
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&u3phy1 {
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status = "okay";
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};
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&u3phy2 {
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status = "okay";
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};
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&u3phy3 {
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status = "okay";
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};
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&xhci0 {
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vusb33-supply = <&mt6359_vusb_ldo_reg>;
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vbus-supply = <&otg_vbus_regulator>;
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status = "okay";
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};
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&xhci1 {
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vusb33-supply = <&mt6359_vusb_ldo_reg>;
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status = "okay";
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};
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&xhci2 {
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vusb33-supply = <&mt6359_vusb_ldo_reg>;
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status = "okay";
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};
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&xhci3 {
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vusb33-supply = <&mt6359_vusb_ldo_reg>;
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status = "okay";
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};
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