1004 lines
20 KiB
Plaintext
1004 lines
20 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: Ben Ho <ben.ho@mediatek.com>
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* Erin Lo <erin.lo@mediatek.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "mt8183.dtsi"
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#include "mt6358.dtsi"
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/ {
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aliases {
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serial0 = &uart0;
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mmc0 = &mmc0;
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mmc1 = &mmc1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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backlight_lcd0: backlight_lcd0 {
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compatible = "pwm-backlight";
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pwms = <&pwm0 0 500000>;
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power-supply = <&bl_pp5000>;
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enable-gpios = <&pio 176 0>;
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brightness-levels = <0 1023>;
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num-interpolated-steps = <1023>;
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default-brightness-level = <576>;
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status = "okay";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x80000000>;
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};
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clk32k: oscillator1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "clk32k";
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};
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it6505_pp18_reg: regulator0 {
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compatible = "regulator-fixed";
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regulator-name = "it6505_pp18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&pio 178 0>;
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enable-active-high;
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};
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lcd_pp3300: regulator1 {
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compatible = "regulator-fixed";
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regulator-name = "lcd_pp3300";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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bl_pp5000: regulator2 {
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compatible = "regulator-fixed";
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regulator-name = "bl_pp5000";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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mmc1_fixed_power: regulator3 {
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compatible = "regulator-fixed";
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regulator-name = "mmc1_power";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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mmc1_fixed_io: regulator4 {
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compatible = "regulator-fixed";
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regulator-name = "mmc1_io";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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pp1800_alw: regulator5 {
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compatible = "regulator-fixed";
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regulator-name = "pp1800_alw";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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pp3300_alw: regulator6 {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_alw";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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scp_mem_reserved: scp_mem_region {
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compatible = "shared-dma-pool";
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reg = <0 0x50000000 0 0x2900000>;
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no-map;
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};
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};
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sound: mt8183-sound {
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mediatek,platform = <&afe>;
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pinctrl-names = "default",
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"aud_tdm_out_on",
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"aud_tdm_out_off";
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pinctrl-0 = <&aud_pins_default>;
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pinctrl-1 = <&aud_pins_tdm_out_on>;
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pinctrl-2 = <&aud_pins_tdm_out_off>;
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status = "okay";
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};
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btsco: bt-sco {
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compatible = "linux,bt-sco";
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};
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wifi_pwrseq: wifi-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_pins_pwrseq>;
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/* Toggle WIFI_ENABLE to reset the chip. */
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reset-gpios = <&pio 119 1>;
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};
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wifi_wakeup: wifi-wakeup {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_pins_wakeup>;
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button-wowlan {
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label = "Wake on WiFi";
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gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_WAKEUP>;
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wakeup-source;
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};
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};
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tboard_thermistor1: thermal-sensor1 {
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compatible = "generic-adc-thermal";
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#thermal-sensor-cells = <0>;
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io-channels = <&auxadc 0>;
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io-channel-names = "sensor-channel";
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temperature-lookup-table = < (-5000) 1553
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0 1488
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5000 1412
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10000 1326
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15000 1232
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20000 1132
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25000 1029
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30000 925
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35000 823
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40000 726
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45000 635
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50000 552
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55000 478
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60000 411
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65000 353
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70000 303
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75000 260
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80000 222
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85000 190
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90000 163
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95000 140
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100000 121
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105000 104
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110000 90
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115000 78
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120000 67
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125000 59>;
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};
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tboard_thermistor2: thermal-sensor2 {
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compatible = "generic-adc-thermal";
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#thermal-sensor-cells = <0>;
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io-channels = <&auxadc 1>;
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io-channel-names = "sensor-channel";
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temperature-lookup-table = < (-5000) 1553
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0 1488
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5000 1412
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10000 1326
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15000 1232
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20000 1132
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25000 1029
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30000 925
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35000 823
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40000 726
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45000 635
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50000 552
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55000 478
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60000 411
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65000 353
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70000 303
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75000 260
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80000 222
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85000 190
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90000 163
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95000 140
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100000 121
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105000 104
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110000 90
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115000 78
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120000 67
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125000 59>;
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};
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};
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&afe {
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i2s3-share = "I2S2";
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i2s0-share = "I2S5";
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};
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&auxadc {
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status = "okay";
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};
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&cci {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu0 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu1 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu2 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu3 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu4 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu5 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu6 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu7 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&dsi0 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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panel: panel@0 {
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/* compatible will be set in board dts */
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reg = <0>;
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enable-gpios = <&pio 45 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&panel_pins_default>;
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avdd-supply = <&ppvarn_lcd>;
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avee-supply = <&ppvarp_lcd>;
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pp1800-supply = <&pp1800_lcd>;
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backlight = <&backlight_lcd0>;
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rotation = <270>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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ports {
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port {
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dsi_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&gic {
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mediatek,broken-save-restore-fw;
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};
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&gpu {
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mali-supply = <&mt6358_vgpu_reg>;
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sram-supply = <&mt6358_vsram_gpu_reg>;
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_pins>;
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status = "okay";
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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&i2c5 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_pins>;
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status = "okay";
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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&i2c6 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6_pins>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&mipi_tx0 {
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status = "okay";
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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bus-width = <8>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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cap-mmc-hw-reset;
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no-sdio;
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no-sd;
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hs400-ds-delay = <0x12814>;
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vmmc-supply = <&mt6358_vemc_reg>;
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vqmmc-supply = <&mt6358_vio18_reg>;
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assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
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assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
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non-removable;
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};
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&mmc1 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_uhs>;
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vmmc-supply = <&mmc1_fixed_power>;
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vqmmc-supply = <&mmc1_fixed_io>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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max-frequency = <200000000>;
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drv-type = <2>;
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cap-sd-highspeed;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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keep-power-in-suspend;
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wakeup-source;
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cap-sdio-irq;
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non-removable;
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no-mmc;
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no-sd;
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assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
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assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
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#address-cells = <1>;
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#size-cells = <0>;
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qca_wifi: qca-wifi@1 {
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compatible = "qcom,ath10k";
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reg = <1>;
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};
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};
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&mt6358_vdram2_reg {
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regulator-always-on;
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};
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&mt6358codec {
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Avdd-supply = <&mt6358_vaud28_reg>;
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};
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&mt6358_vsim1_reg {
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2700000>;
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};
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&mt6358_vsim2_reg {
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2700000>;
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};
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&pio {
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aud_pins_default: audiopins {
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pins_bus {
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pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
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<PINMUX_GPIO98__FUNC_I2S2_BCK>,
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<PINMUX_GPIO101__FUNC_I2S2_LRCK>,
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<PINMUX_GPIO102__FUNC_I2S2_DI>,
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<PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
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<PINMUX_GPIO89__FUNC_I2S5_BCK>,
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<PINMUX_GPIO90__FUNC_I2S5_LRCK>,
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<PINMUX_GPIO91__FUNC_I2S5_DO>,
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<PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
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<PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
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<PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
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<PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
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<PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
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<PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
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<PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
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<PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
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<PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
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};
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};
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aud_pins_tdm_out_on: audiotdmouton {
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pins_bus {
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pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
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<PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
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<PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
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<PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
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<PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
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<PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
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drive-strength = <MTK_DRIVE_6mA>;
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};
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};
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aud_pins_tdm_out_off: audiotdmoutoff {
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pins_bus {
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pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
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<PINMUX_GPIO170__FUNC_GPIO170>,
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<PINMUX_GPIO171__FUNC_GPIO171>,
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<PINMUX_GPIO172__FUNC_GPIO172>,
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<PINMUX_GPIO173__FUNC_GPIO173>,
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<PINMUX_GPIO10__FUNC_GPIO10>;
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input-enable;
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bias-pull-down;
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drive-strength = <MTK_DRIVE_2mA>;
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};
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};
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bt_pins: bt-pins {
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pins_bt_en {
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pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
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output-low;
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};
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};
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ec_ap_int_odl: ec_ap_int_odl {
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pins1 {
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pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
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input-enable;
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bias-pull-up;
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};
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};
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h1_int_od_l: h1_int_od_l {
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pins1 {
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pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
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input-enable;
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};
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};
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i2c0_pins: i2c0 {
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pins_bus {
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pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
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<PINMUX_GPIO83__FUNC_SCL0>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c1_pins: i2c1 {
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pins_bus {
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pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
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<PINMUX_GPIO84__FUNC_SCL1>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c2_pins: i2c2 {
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pins_bus {
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pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
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<PINMUX_GPIO104__FUNC_SDA2>;
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bias-disable;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c3_pins: i2c3 {
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pins_bus {
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pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
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<PINMUX_GPIO51__FUNC_SDA3>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c4_pins: i2c4 {
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pins_bus {
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pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
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<PINMUX_GPIO106__FUNC_SDA4>;
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bias-disable;
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mediatek,drive-strength-adv = <00>;
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};
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};
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|
|
i2c5_pins: i2c5 {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
|
|
<PINMUX_GPIO49__FUNC_SDA5>;
|
|
mediatek,pull-up-adv = <3>;
|
|
mediatek,drive-strength-adv = <00>;
|
|
};
|
|
};
|
|
|
|
i2c6_pins: i2c6 {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
|
|
<PINMUX_GPIO12__FUNC_SDA6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
mmc0_pins_default: mmc0-pins-default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
|
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
|
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
|
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
|
|
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
|
|
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
|
|
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
|
|
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
|
|
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
|
|
input-enable;
|
|
drive-strength = <MTK_DRIVE_14mA>;
|
|
mediatek,pull-up-adv = <01>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
|
drive-strength = <MTK_DRIVE_14mA>;
|
|
mediatek,pull-down-adv = <10>;
|
|
};
|
|
|
|
pins_rst {
|
|
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
|
drive-strength = <MTK_DRIVE_14mA>;
|
|
mediatek,pull-down-adv = <01>;
|
|
};
|
|
};
|
|
|
|
mmc0_pins_uhs: mmc0-pins-uhs {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
|
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
|
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
|
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
|
|
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
|
|
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
|
|
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
|
|
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
|
|
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
|
|
input-enable;
|
|
drive-strength = <MTK_DRIVE_14mA>;
|
|
mediatek,pull-up-adv = <01>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
|
drive-strength = <MTK_DRIVE_14mA>;
|
|
mediatek,pull-down-adv = <10>;
|
|
};
|
|
|
|
pins_ds {
|
|
pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
|
|
drive-strength = <MTK_DRIVE_14mA>;
|
|
mediatek,pull-down-adv = <10>;
|
|
};
|
|
|
|
pins_rst {
|
|
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
|
drive-strength = <MTK_DRIVE_14mA>;
|
|
mediatek,pull-up-adv = <01>;
|
|
};
|
|
};
|
|
|
|
mmc1_pins_default: mmc1-pins-default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
|
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
|
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
|
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
|
|
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
|
|
input-enable;
|
|
mediatek,pull-up-adv = <10>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
|
input-enable;
|
|
mediatek,pull-down-adv = <10>;
|
|
};
|
|
};
|
|
|
|
mmc1_pins_uhs: mmc1-pins-uhs {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
|
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
|
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
|
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
|
|
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
|
|
drive-strength = <MTK_DRIVE_6mA>;
|
|
input-enable;
|
|
mediatek,pull-up-adv = <10>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
mediatek,pull-down-adv = <10>;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
panel_pins_default: panel_pins_default {
|
|
panel_reset {
|
|
pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
|
|
output-low;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pwm0_pin_default: pwm0_pin_default {
|
|
pins1 {
|
|
pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
|
|
output-high;
|
|
bias-pull-up;
|
|
};
|
|
pins2 {
|
|
pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
|
|
};
|
|
};
|
|
|
|
scp_pins: scp {
|
|
pins_scp_uart {
|
|
pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
|
|
<PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
|
|
};
|
|
};
|
|
|
|
spi0_pins: spi0 {
|
|
pins_spi{
|
|
pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
|
|
<PINMUX_GPIO86__FUNC_GPIO86>,
|
|
<PINMUX_GPIO87__FUNC_SPI0_MO>,
|
|
<PINMUX_GPIO88__FUNC_SPI0_CLK>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
spi1_pins: spi1 {
|
|
pins_spi{
|
|
pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
|
|
<PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
|
|
<PINMUX_GPIO163__FUNC_SPI1_A_MO>,
|
|
<PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
spi2_pins: spi2 {
|
|
pins_spi{
|
|
pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
|
|
<PINMUX_GPIO1__FUNC_SPI2_MO>,
|
|
<PINMUX_GPIO2__FUNC_SPI2_CLK>;
|
|
bias-disable;
|
|
};
|
|
pins_spi_mi {
|
|
pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
|
|
mediatek,pull-down-adv = <00>;
|
|
};
|
|
};
|
|
|
|
spi3_pins: spi3 {
|
|
pins_spi{
|
|
pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
|
|
<PINMUX_GPIO22__FUNC_SPI3_CSB>,
|
|
<PINMUX_GPIO23__FUNC_SPI3_MO>,
|
|
<PINMUX_GPIO24__FUNC_SPI3_CLK>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
spi4_pins: spi4 {
|
|
pins_spi{
|
|
pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
|
|
<PINMUX_GPIO18__FUNC_SPI4_CSB>,
|
|
<PINMUX_GPIO19__FUNC_SPI4_MO>,
|
|
<PINMUX_GPIO20__FUNC_SPI4_CLK>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
spi5_pins: spi5 {
|
|
pins_spi{
|
|
pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
|
|
<PINMUX_GPIO14__FUNC_SPI5_CSB>,
|
|
<PINMUX_GPIO15__FUNC_SPI5_MO>,
|
|
<PINMUX_GPIO16__FUNC_SPI5_CLK>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
uart0_pins_default: uart0-pins-default {
|
|
pins_rx {
|
|
pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
pins_tx {
|
|
pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
|
|
};
|
|
};
|
|
|
|
uart1_pins_default: uart1-pins-default {
|
|
pins_rx {
|
|
pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
pins_tx {
|
|
pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
|
|
};
|
|
pins_rts {
|
|
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
|
|
output-enable;
|
|
};
|
|
pins_cts {
|
|
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
uart1_pins_sleep: uart1-pins-sleep {
|
|
pins_rx {
|
|
pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
pins_tx {
|
|
pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
|
|
};
|
|
pins_rts {
|
|
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
|
|
output-enable;
|
|
};
|
|
pins_cts {
|
|
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
wifi_pins_pwrseq: wifi-pins-pwrseq {
|
|
pins_wifi_enable {
|
|
pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
wifi_pins_wakeup: wifi-pins-wakeup {
|
|
pins_wifi_wakeup {
|
|
pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwm0_pin_default>;
|
|
};
|
|
|
|
&scp {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&scp_pins>;
|
|
|
|
cros_ec {
|
|
compatible = "google,cros-ec-rpmsg";
|
|
mediatek,rpmsg-name = "cros-ec-rpmsg";
|
|
};
|
|
};
|
|
|
|
&mfg_async {
|
|
domain-supply = <&mt6358_vsram_gpu_reg>;
|
|
};
|
|
|
|
&mfg {
|
|
domain-supply = <&mt6358_vgpu_reg>;
|
|
};
|
|
|
|
&soc_data {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi0_pins>;
|
|
mediatek,pad-select = <0>;
|
|
status = "okay";
|
|
cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
|
|
|
|
cr50@0 {
|
|
compatible = "google,cr50";
|
|
reg = <0>;
|
|
spi-max-frequency = <1000000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&h1_int_od_l>;
|
|
interrupt-parent = <&pio>;
|
|
interrupts = <153 IRQ_TYPE_EDGE_RISING>;
|
|
};
|
|
};
|
|
|
|
&spi1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_pins>;
|
|
mediatek,pad-select = <0>;
|
|
status = "okay";
|
|
|
|
w25q64dw: flash@0 {
|
|
compatible = "winbond,w25q64dw", "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
};
|
|
};
|
|
|
|
&spi2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi2_pins>;
|
|
mediatek,pad-select = <0>;
|
|
status = "okay";
|
|
|
|
cros_ec: cros-ec@0 {
|
|
compatible = "google,cros-ec-spi";
|
|
reg = <0>;
|
|
spi-max-frequency = <3000000>;
|
|
interrupt-parent = <&pio>;
|
|
interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ec_ap_int_odl>;
|
|
|
|
i2c_tunnel: i2c-tunnel {
|
|
compatible = "google,cros-ec-i2c-tunnel";
|
|
google,remote-bus = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
usbc_extcon: extcon0 {
|
|
compatible = "google,extcon-usbc-cros-ec";
|
|
google,usb-port-id = <0>;
|
|
};
|
|
|
|
cbas {
|
|
compatible = "google,cros-cbas";
|
|
};
|
|
|
|
typec {
|
|
compatible = "google,cros-ec-typec";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
usb_c0: connector@0 {
|
|
compatible = "usb-c-connector";
|
|
reg = <0>;
|
|
power-role = "dual";
|
|
data-role = "host";
|
|
try-power-role = "sink";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi3_pins>;
|
|
mediatek,pad-select = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&spi4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi4_pins>;
|
|
mediatek,pad-select = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&spi5 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi5_pins>;
|
|
mediatek,pad-select = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&ssusb {
|
|
dr_mode = "host";
|
|
wakeup-source;
|
|
vusb33-supply = <&mt6358_vusb_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&thermal_zones {
|
|
tboard1 {
|
|
polling-delay = <1000>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&tboard_thermistor1>;
|
|
};
|
|
|
|
tboard2 {
|
|
polling-delay = <1000>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&tboard_thermistor2>;
|
|
};
|
|
};
|
|
|
|
&u3phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pins_default>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&uart1_pins_default>;
|
|
pinctrl-1 = <&uart1_pins_sleep>;
|
|
status = "okay";
|
|
interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
|
|
<&pio 121 IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
bluetooth: bluetooth {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&bt_pins>;
|
|
status = "okay";
|
|
compatible = "qcom,qca6174-bt";
|
|
enable-gpios = <&pio 120 0>;
|
|
clocks = <&clk32k>;
|
|
firmware-name = "nvm_00440302_i2s.bin";
|
|
};
|
|
};
|
|
|
|
&usb_host {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
vusb33-supply = <&mt6358_vusb_reg>;
|
|
status = "okay";
|
|
|
|
hub@1 {
|
|
compatible = "usb5e3,610";
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
#include <arm/cros-ec-keyboard.dtsi>
|
|
#include <arm/cros-ec-sbs.dtsi>
|